Abstract: The present disclosed subject matter is directed to medical devices and methods that assist in non-invasively determining elastic properties (e.g., elasticity, viscosity, etc.) of superficial tissues, especially superficial corneal tissues such as the epithelium and stroma, using acoustic energy.

Abstract: Systems and methods for visualizing lesions in tissue are provided. The systems and the system and methods exploit the differential scattering of ultrasound waves by normal and lesioned tissues to image the lesions. Spectrum analysis of the harmonics in diagnostic ultrasound waves that are differentially backscattered from lesioned and normal tissues provides image contrast and resolution.

Abstract: Functionalized chondroitin sulfate, cross-linked polymer matrices comprising functionalized chondroitin sulfate, and methods of making and using the same are provided. Such polymer matrices may be used for tissue engineering, reconstructing cartilage, and the like. Kits are also provided for detection of cartilage degrading enzymes.

Abstract: A method of making a transistor array includes forming a plurality of gate electrodes insulated from a semiconductor substrate having an impurity of a given conductivity, introducing a first impurity having a conductivity opposite to that of the given conductivity into a given region of the substrate which is adjacent to an edge of each of the gate electrodes, introducing a second impurity having the given conductivity into given regions adjacent to selected gate electrodes, the second impurity having a significantly higher diffusivity than that of the first impurity in the semiconductor substrate, and driving the second impurity along the surface of the semiconductor substrate to form in the substrate under each of the selected gate electrodes a region having a concentration of impurity of the given conductivity higher than that of the semiconductor substrate. The transistor array may be used, e.g.

Abstract: A method for making high density integrated circuits which utilizes lift-off techniques provides a structure having a single layer of insulating material for both the dielectric of a storage capacitor and the insulator for a gate or control electrode of a switching element. The steps of the method include forming a thin layer of silicon dioxide on a silicon substrate followed by a layer of first doped polysilicon and, optionally, a layer of silicon nitride and then a layer of photoresist. The layers are etched to the silicon dioxide surface with the exception of the portion of the layers overlying a region defined as the gate or control electrode of the switching element. A second layer of doped polysilicon is then deposited over the remaining structure to provide on the silicon dioxide layer a second conductive layer adjacent to but spaced from the first polysilicon layer forming the gate or control electrode.

Abstract: This describes a process for fabricating transistor memory cell arrays which includes forming a thin oxide which is continuous over the entire area and which is continuously protected from the time it is deposited so that subsequent processing steps will not cause any change in the thickness of the thin oxide except where deliberately desired. By first depositing a protective masking film and subsequently removing this film in a series of steps, so that this film is lost in the fabrication process, the need for using the dual dielectric insulating layers required in the prior art can be eliminated. By eliminating such dual dielectric insulating layers the performance and density of the arrays can be improved.Semiconductor arrays are formed by providing at a surface of a semiconductor substrate a pair of isolation lines and a plurality of conductive lines orthogonal to the isolation lines.

Abstract: Fully integrated non-volatile and fixed threshold field effect devices are fabricated in N-channel technology on a single semiconductor substrate. MOSFET devices of the metal-nitride-oxide-semiconductor (MNOS) devices are used both as fixed threshold support devices and as variable threshold non-volatile memory array devices. Extremely stable and reproducible device characteristics result from the use of low charge containing dielectrics which allow optimum variable threshold stability and allow the use of operating potentials compatable with conventional fixed threshold FET devices. Low temperature processing following deposition of variable threshold gate dielectric enables all enhancement mode operation. A field oxide structure including a thin silicon dioxide layer, an aluminum oxide layer and a nitride layer provides parasitic threshold voltages in excess of 60 volts and prevents sub-threshold leakage.