Patents by Inventor Ronald T. Jerdonek

Ronald T. Jerdonek has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6888539
    Abstract: A method for facilitating transfer of Human Machine Interface (HMI) files. The method includes uploading at least one HMI file via a network to a server and converting the at least one HMI file into an image file.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: May 3, 2005
    Assignee: General Electric Company
    Inventors: Jeffrey A. Iris, Ronald T. Jerdonek, Carol Ann Cummiskey
  • Publication number: 20040054756
    Abstract: A method for facilitating transfer of Human Machine Interface (HMI) files. The method includes uploading at least one HMI file via a network to a server and converting the at least one HMI file into an image file.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 18, 2004
    Inventors: Jeffrey A. Iris, Ronald T. Jerdonek, Carol Ann Cummiskey
  • Publication number: 20040044748
    Abstract: A method for facilitating transfer of Human Machine Interface (HMI) files. The method includes uploading at least one HMI file via a network to a main server, storing an image of the at least one HMI file on the main server, and storing the at least one HMI file on a secure server.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 4, 2004
    Inventors: Jeffrey A. Iris, Ronald T. Jerdonek, Carol Ann Cummiskey
  • Publication number: 20040044581
    Abstract: A method for facilitating transfer of Human Machine Interface (HMI) files. The method includes receiving at least one HMI file via a network from a user, and issuing a download credit for the received HMI file to the user.
    Type: Application
    Filed: August 27, 2002
    Publication date: March 4, 2004
    Inventors: Jeffrey A. Iris, Ronald T. Jerdonek, Carol Ann Cummiskey
  • Patent number: 4378565
    Abstract: An integrated circuit structure for reducing propagation delay is described. Integrated circuits include at least a pair of regions in each of which are located a respective plurality of functional cells and which are spaced apart by an interconnection region in which interconnection lines are provided connecting elements of the functional cells of one functional cell region with elements of the functional cells of the other functional cell region. Field oxide is provided in the interconnection region substantially greater in thickness than the field oxide in the regions of the functional cells thereby substantially reducing the capacitance and hence propagation delay of the interconnection lines. Formation of the field oxide of the interconnection region independent of the formation of the field oxide in the functional cell regions enables optimization of the field oxide in the interconnection region for minimum propagation delay without compromising functional cell formation in the functional cell regions.
    Type: Grant
    Filed: October 1, 1980
    Date of Patent: March 29, 1983
    Assignee: General Electric Company
    Inventors: Mario Ghezzo, Ronald T. Jerdonek