Abstract: A switching module comprises input buses (1--1 , . . . 1-n) and at least one output bus (2-ij), in which each input bus, for data packet transmission, is connected to the output bus by means of a crosspoint switch (4-i). Each crosspoint switch (4-ij) has a unique address and a request output (61) for sending out a request signal. The switching module further includes allocation means (3-j) which place empty packets having the unique address of a crosspoint switch (4-ij) onto the output bus (2-j). The allocation means (3-j) comprise recording means (105,201) for receiving the request signals and include a FIFO (107,206) for storing representatives of the unique crosspoint switch addresses that are derived from the request signals. The allocation means (3-j) further include a packet generator (103) for deriving addresses from the representations from the queue store (107,206) and allocating these addresses to the empty packets.

Abstract: Two separate switching systems, a first one for switching packet oriented data and a second one for switching circuit oriented data as known from the state of the art can, according to the invention and with regard to their function, be integrated into a single switching system. This is realized by storing the packet oriented data in a first section of a switch memory (33) and the circuit oriented data in a second section of this same switch memory (33).With this realization additional advantages occur such as a movable boundary in the switch memory (33) between the packet oriented section and the circuit oriented section and a saturation monitoring that can be realized in a simple fashion in the switch memory (33).