Patents by Inventor Ronald Thomas Bertram, Jr.

Ronald Thomas Bertram, Jr. has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9644285
    Abstract: Methods of depositing compound semiconductor materials on one or more substrates include metering and controlling a flow rate of a precursor liquid from a precursor liquid source into a vaporizer. The precursor liquid may comprise at least one of GaCl3, InCl3, and AlCl3 in a liquid state. The precursor liquid may be vaporized within the vaporizer to form a first precursor vapor. The first precursor vapor and a second precursor vapor may be caused to flow into a reaction chamber, and a compound semiconductor material may be deposited on a surface of a substrate within the reaction chamber from the precursor vapors. Deposition systems for performing such methods include devices for metering and/or controlling a flow of a precursor liquid from a liquid source to a vaporizer, while the precursor liquid remains in the liquid state.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: May 9, 2017
    Assignee: SOITEC
    Inventor: Ronald Thomas Bertram, Jr.
  • Patent number: 9481944
    Abstract: The present invention provides improved gas injectors for use with CVD (chemical vapor deposition) systems that thermalize gases prior to injection into a CVD chamber. The provided injectors are configured to increase gas flow times through heated zones and include gas-conducting conduits that lengthen gas residency times in the heated zones. The provided injectors also have outlet ports sized, shaped, and arranged to inject gases in selected flow patterns. The invention also provides CVD systems using the provided thermalizing gas injectors. The present invention has particular application to high-volume manufacturing of GaN substrates.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: November 1, 2016
    Assignee: Soitec
    Inventors: Chantal Arena, Ronald Thomas Bertram, Jr., Ed Lindow, Christiaan Werkhoven
  • Patent number: 9412580
    Abstract: Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: August 9, 2016
    Assignee: SOITEC
    Inventors: Chantal Arena, Ronald Thomas Bertram, Jr., Ed Lindow, Subhash Mahajan, Fanyu Meng
  • Publication number: 20160145767
    Abstract: Deposition systems include a reaction chamber, and a substrate support structure disposed at least partially within the reaction chamber. The systems further include at least one gas injection device and at least one vacuum device, which together are used to flow process gases through the reaction chamber. The systems also include at least one access gate through which a workpiece substrate may be loaded into the reaction chamber and unloaded out from the reaction chamber. The at least one access gate is located remote from the gas injection device. Methods of depositing semiconductor material may be performed using such deposition systems. Methods of fabricating such deposition systems may include coupling an access gate to a reaction chamber at a location remote from a gas injection device.
    Type: Application
    Filed: February 2, 2016
    Publication date: May 26, 2016
    Inventors: Ronald Thomas Bertram, JR., Christiaan J. Werkhoven, Chantal Arena, Ed Lindow
  • Patent number: 9175419
    Abstract: This invention provides gas injector apparatus that extends into a growth chamber in order to provide more accurate delivery of thermalized precursor gases. The improved injector can distribute heated precursor gases into a growth chamber in flows that are spatially separated from each other up until they impinge on a growth substrate and that have volumes adequate for high-volume manufacture. Importantly, the improved injector is sized and configured so that it can fit into existing commercial growth chambers without hindering the operation of mechanical and robot substrate-handling equipment used with such chambers. This invention is useful for the high-volume growth of numerous elemental and compound semiconductors, and particularly useful for the high-volume growth of Group III-V compounds and GaN.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: November 3, 2015
    Assignee: SOITEC
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow, Dennis L. Goodwin
  • Patent number: 9076666
    Abstract: Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semi-conductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: July 7, 2015
    Assignees: SOITEC, Arizona Board of Regents For and On Behalf Arizona State University
    Inventors: Chantal Arena, Ronald Thomas Bertram, Jr., Ed Lindow, Subhash Mahajan, Ilsu Han
  • Publication number: 20150167161
    Abstract: A gas injector includes a base plate, a middle plate, and a top plate. The base plate, middle plate, and top plate are configured to flow a purge gas between the base plate and the middle plate and to flow a precursor gas between the middle plate and the top plate. Another gas injector includes a precursor gas inlet, a lateral precursor gas flow channel, and a plurality of precursor gas flow channels. The plurality of precursor gas flow channels extend from the at least one lateral precursor gas flow channel to an outlet of the gas injector. Methods of forming a material on a substrate include flowing a precursor between a middle plate and a top plate of a gas injector and flowing a purge gas between a base plate and the middle plate of the gas injector.
    Type: Application
    Filed: May 24, 2013
    Publication date: June 18, 2015
    Applicant: Soitec
    Inventors: Claudio Canizares, Dan Gura, Ronald Thomas Bertram, JR.
  • Publication number: 20150099065
    Abstract: Visor injectors include a gas injector port, internal sidewalls, and at least two ridges for directing gas flow through the visor injectors. Each of the ridges extends from a location proximate a hole in the gas injector port toward a gas outlet of the visor injector and is positioned between the internal sidewalls. Deposition systems include a base with divergently extending internal sidewalls, a gas injection port, a lid, and at least two divergently extending ridges for directing gas flow through a central region of a space at least partially defined by the internal sidewalls of the base and a bottom surface of the lid. Methods of forming a material on a substrate include flowing a precursor through such a visor injector and directing a portion of the precursor to flow through a central region of the visor injector with at least two ridges.
    Type: Application
    Filed: May 24, 2013
    Publication date: April 9, 2015
    Inventors: Claudio Canizares, Ronald Thomas Bertram, Jr.
  • Publication number: 20140217553
    Abstract: Methods of depositing III-nitride semiconductor materials on substrates include depositing a layer of III-nitride semiconductor material on a surface of a substrate in a nucleation HVPE process stage to form a nucleation layer having a microstructure comprising at least some amorphous III-nitride semiconductor material. The nucleation layer may be annealed to form crystalline islands of epitaxial nucleation material on the surface of the substrate. The islands of epitaxial nucleation material may be grown and coalesced in a coalescence HVPE process stage to form a nucleation template layer of the epitaxial nucleation material. The nucleation template layer may at least substantially cover the surface of the substrate. Additional III-nitride semiconductor material may be deposited over the nucleation template layer of the epitaxial nucleation material in an additional HVPE process stage. Final and intermediate structures comprising III-nitride semiconductor material are formed by such methods.
    Type: Application
    Filed: November 23, 2011
    Publication date: August 7, 2014
    Applicants: ARIZONA BOARD OF REGENTS FOR AND ON BEHALF OF ARIZONA STATE UNIVERSITY, Soitec
    Inventors: Chantal Arena, Ronald Thomas Bertram, JR., Ed Lindow, Subhash Mahajan, Ilsu Han
  • Patent number: 8741385
    Abstract: The present invention relates to the field of semiconductor processing and provides methods that improve chemical vapor deposition (CVD) of semiconductor materials by promoting more efficient thermalization of precursor gases prior to their reaction. In preferred embodiments, the method provides heat transfer structures and their arrangement within a CVD reactor so as to promote heat transfer to flowing process gases. In certain preferred embodiments applicable to CVD reactors transparent to radiation from heat lamps, the invention provides radiation-absorbent surfaces placed to intercept radiation from the heat lamps and to transfer it to flowing process gases.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: June 3, 2014
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow
  • Patent number: 8574968
    Abstract: This invention provides methods for fabricating substantially continuous layers of a group III nitride semiconductor material having low defect densities and optionally having a selected crystal polarity. The methods include epitaxial growth nucleating and/or seeding on the upper portions of a plurality of pillars/islands of a group III nitride material that are irregularly arranged on a template structure. The upper portions of the islands have low defect densities and optionally have a selected crystal polarity. The invention also includes template structures having a substantially continuous layer of a masking material through which emerge upper portions of the pillars/islands. The invention also includes such template structures. The invention can be applied to a wide range of semiconductor materials, both elemental semiconductors, e.g., combinations of Si (silicon) with strained Si (sSi) and/or Ge (germanium), and compound semiconductors, e.g.
    Type: Grant
    Filed: July 25, 2008
    Date of Patent: November 5, 2013
    Assignees: Soitec, Arizona Board of Regents for and on Behalf of Arizona State University
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow, Subhash Mahajan, Ranjan Datta, Rahul Ajay Trivedi, Ilsu Han
  • Publication number: 20130280892
    Abstract: Methods of depositing material on a substrate include forming a precursor gas and a byproduct from a source gas within a thermalizing gas injector. The byproduct may be reacted with a liquid reagent to form additional precursor gas, which may be injected from the thermalizing gas injector into a reaction chamber. Thermalizing gas injectors for injecting gas into a reaction chamber of a deposition system may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. A pathway may extend from the inlet, through the thermalizing conduit to an interior space within the liquid container, and from the interior space within the liquid container to the outlet. The thermalizing conduit may have a length that is greater than a shortest distance between the inlet and the liquid container. Deposition systems may include one or more such thermalizing gas injectors.
    Type: Application
    Filed: June 17, 2013
    Publication date: October 24, 2013
    Inventor: Ronald Thomas Bertram, JR.
  • Publication number: 20130234157
    Abstract: Embodiments of the invention include methods for forming Group III-nitride semiconductor structure using a halide vapor phase epitaxy (HVPE) process. The methods include forming a continuous Group III-nitride nucleation layer on a surface of a non-native growth substrate, the continuous Group III-nitride nucleation layer concealing the upper surface of the non-native growth substrate. Forming the continuous Group III-nitride nucleation layer may include forming a Group III-nitride layer and thermally treating said Group III-nitride layer. Methods may further include forming a further Group III-nitride layer upon the continuous Group III-nitride nucleation layer.
    Type: Application
    Filed: November 23, 2011
    Publication date: September 12, 2013
    Applicant: Soitec
    Inventors: Chantal Arena, Ronald Thomas Bertram, JR., Ed Lindow, Subhash Mahajan, Fanyu Meng
  • Patent number: 8486192
    Abstract: Methods of depositing material on a substrate include forming a precursor gas and a byproduct from a source gas within a thermalizing gas injector. The byproduct may be reacted with a liquid reagent to form additional precursor gas, which may be injected from the thermalizing gas injector into a reaction chamber. Thermalizing gas injectors for injecting gas into a reaction chamber of a deposition system may include an inlet, a thermalizing conduit, a liquid container configured to hold a liquid reagent therein, and an outlet. A pathway may extend from the inlet, through the thermalizing conduit to an interior space within the liquid container, and from the interior space within the liquid container to the outlet. The thermalizing conduit may have a length that is greater than a shortest distance between the inlet and the liquid container. Deposition systems may include one or more such thermalizing gas injectors.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: July 16, 2013
    Assignee: Soitec
    Inventor: Ronald Thomas Bertram, Jr.
  • Publication number: 20130160802
    Abstract: Processes and systems are used to reduce undesired deposits within a reaction chamber associated with a semiconductor deposition system. A cleaning gas may be caused to flow through at least one gas flow path extending through at least one gas furnace, and the heated cleaning gas may be introduced into a reaction chamber to remove at least a portion of undesired deposits from within the reaction chamber.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 27, 2013
    Applicant: Soitec
    Inventor: Ronald Thomas Bertram, JR.
  • Patent number: 8455370
    Abstract: This invention provides methods that permit wafers to be loaded and unloaded in a gas-phase epitaxial growth chamber at high temperatures. Specifically, this invention provides a method for moving wafers or substrates that can bathe a substrate being moved in active gases that are optionally temperature controlled. The active gases can act to limit or prevent sublimation or decomposition of the wafer surface, and can be temperature controlled to limit or prevent thermal damage. Thereby, previously-necessary temperature ramping of growth chambers can be reduced or eliminated leading to improvement in wafer throughput and system efficiency.
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: June 4, 2013
    Assignee: Soitec
    Inventors: Michael Albert Tischler, Ronald Thomas Bertram, Jr.
  • Patent number: 8431419
    Abstract: A semiconductor growth system includes a chamber and a source of electromagnetic radiation. A detector is arranged to detect absorption of radiation from the source by a chloride- based chemical of the reaction chamber. A control system controls the operation of the chamber in response to the absorption of radiation by the chloride-based chemical. The control system controls the operation of the chamber by adjusting a parameter of the reaction chamber.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: April 30, 2013
    Assignee: Soitec
    Inventors: Ronald Thomas Bertram, Jr., Chantal Arena, Christiaan J. Werkhoven, Michael Albert Tischler, Vasil Vorsa, Andrew D. Johnson
  • Patent number: 8388755
    Abstract: The present invention relates to the field of semiconductor processing and provides apparatus and methods that improve chemical vapor deposition (CVD) of semiconductor materials by promoting more efficient thermalization of precursor gases prior to their reaction. In preferred embodiments, the invention comprises heat transfer structures and their arrangement within a CVD reactor so as to promote heat transfer to flowing process gases. In certain preferred embodiments applicable to CVD reactors transparent to radiation from heat lamps, the invention comprises radiation-absorbent surfaces placed to intercept radiation from the heat lamps and to transfer it to flowing process gases.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: March 5, 2013
    Assignee: Soitec
    Inventors: Chantal Arena, Christiaan J. Werkhoven, Ronald Thomas Bertram, Jr., Ed Lindow
  • Publication number: 20130052806
    Abstract: Deposition systems include a reaction chamber, and a substrate support structure disposed at least partially within the reaction chamber. The systems further include at least one gas injection device and at least one vacuum device, which together are used to flow process gases through the reaction chamber. The systems also include at least one access gate through which a workpiece substrate may be loaded into the reaction chamber and unloaded out from the reaction chamber. The at least one access gate is located remote from the gas injection device. Methods of depositing semiconductor material may be performed using such deposition systems. Methods of fabricating such deposition systems may include coupling an access gate to a reaction chamber at a location remote from a gas injection device.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 28, 2013
    Applicant: SOITEC
    Inventors: Ronald Thomas Bertram, JR., Christiaan J. Werkhoven, Chantal Arena, Ed Lindow
  • Publication number: 20130047917
    Abstract: Methods of depositing compound semiconductor materials on one or more substrates include metering and controlling a flow rate of a precursor liquid from a precursor liquid source into a vaporizer. The precursor liquid may comprise at least one of GaCl3, InCl3, and AlCl3 in a liquid state. The precursor liquid may be vaporized within the vaporizer to form a first precursor vapor. The first precursor vapor and a second precursor vapor may be caused to flow into a reaction chamber, and a compound semiconductor material may be deposited on a surface of a substrate within the reaction chamber from the precursor vapors. Deposition systems for performing such methods include devices for metering and/or controlling a flow of a precursor liquid from a liquid source to a vaporizer, while the precursor liquid remains in the liquid state.
    Type: Application
    Filed: August 22, 2012
    Publication date: February 28, 2013
    Applicant: SOITEC
    Inventor: Ronald Thomas Bertram, JR.