Patents by Inventor Ronald Thomas Treggiden

Ronald Thomas Treggiden has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Data buffer
    Patent number: 6874043
    Abstract: A direct memory access (DMA) first-in-first-out (FIFO) buffer includes two FIFO devices connected in parallel. An output multiplexer is controlled by a controller to pass to its output data provided by a selected one of the FIFO devices. Data is clocked into one FIFO device until it is full, after which data may be written from it. When data is written from a FIFO device, the FIFO device is emptied before data is again read into it. Using this arrangement, data can be read into one FIFO device while data is written from the other FIFO device.
    Type: Grant
    Filed: April 22, 2002
    Date of Patent: March 29, 2005
    Assignee: Bridgeworks Ltd.
    Inventor: Ronald Thomas Treggiden
  • Data buffer
    Publication number: 20030056039
    Abstract: A direct memory access (DMA) first-in-first-out (FIFO) buffer includes two FIFO devices connected in parallel. An output multiplexer is controlled by a controller to pass to its output data provided by a selected one of the FIFO devices. Data is clocked into one FIFO device until it is full, after which data may be written from it. When data is written from a FIFO device, the FIFO device is emptied before data is again read into it. Using this arrangement, data can be read into one FIFO device whilst data is written from the other FIFO device.
    Type: Application
    Filed: April 22, 2002
    Publication date: March 20, 2003
    Applicant: Digital Interfaces Limited
    Inventor: Ronald Thomas Treggiden
  • A DATA BUFFER
    Publication number: 20020046307
    Abstract: A direct memory access (DMA) first-in-first-out (FIFO) buffer includes two FIFO devices connected in parallel. An output multiplexer is controlled by a controller to pass to its output data provided by a selected one of the FIFO devices. Data is clocked into one FIFO device until it is full, after which data may be written from it. When data is written from a FIFO device, the FIFO device is emptied before data is again read into it. Using this arrangement, data can be read into one FIFO device whilst data is written from the other FIFO device.
    Type: Application
    Filed: February 16, 2001
    Publication date: April 18, 2002
    Inventor: Ronald Thomas Treggiden