Patents by Inventor Ronaldus Johannes Gijsbertus Goossens

Ronaldus Johannes Gijsbertus Goossens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200189192
    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.
    Type: Application
    Filed: February 21, 2020
    Publication date: June 18, 2020
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Yu CAO, Wenjin SHAO, Ronaldus Johannes Gijsbertus GOOSSENS, Jun YE, James Patrick KOONMEN
  • Patent number: 10569469
    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.
    Type: Grant
    Filed: October 28, 2014
    Date of Patent: February 25, 2020
    Assignee: ASML Netherlands B.V.
    Inventors: Yu Cao, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen
  • Patent number: 10137643
    Abstract: Systems and methods for process simulation are described. The methods may use a reference model identifying sensitivity of a reference scanner to a set of tunable parameters. Chip fabrication from a chip design may be simulated using the reference model, wherein the chip design is expressed as one or more masks. An iterative retuning and simulation process may be used to optimize critical dimension in the simulated chip and to obtain convergence of the simulated chip with an expected chip. Additionally, a designer may be provided with a set of results from which an updated chip design is created.
    Type: Grant
    Filed: August 11, 2014
    Date of Patent: November 27, 2018
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Yu Cao, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen
  • Patent number: 9672301
    Abstract: The present invention relates generally to methods and apparatuses for test pattern selection for computational lithography model calibration. According to some aspects, the pattern selection algorithms of the present invention can be applied to any existing pool of candidate test patterns. According to some aspects, the present invention automatically selects those test patterns that are most effective in determining the optimal model parameter values from an existing pool of candidate test patterns, as opposed to designing optimal patterns. According to additional aspects, the selected set of test patterns according to the invention is able to excite all the known physics and chemistry in the model formulation, making sure that the wafer data for the test patterns can drive the model calibration to the optimal parameter values that realize the upper bound of prediction accuracy imposed by the model formulation.
    Type: Grant
    Filed: April 7, 2014
    Date of Patent: June 6, 2017
    Assignee: ASML NETHERLANDS B.V.
    Inventors: Yu Cao, Wenjin Shao, Jun Ye, Ronaldus Johannes Gijsbertus Goossens
  • Publication number: 20150045935
    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.
    Type: Application
    Filed: October 28, 2014
    Publication date: February 12, 2015
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Yu CAO, Wenjin SHAO, Ronaldus Johannes Gijsbertus GOOSSENS, Jun YE, James Patrick KOONMEN
  • Publication number: 20140351773
    Abstract: Systems and methods for process simulation are described. The methods may use a reference model identifying sensitivity of a reference scanner to a set of tunable parameters. Chip fabrication from a chip design may be simulated using the reference model, wherein the chip design is expressed as one or more masks. An iterative retuning and simulation process may be used to optimize critical dimension in the simulated chip and to obtain convergence of the simulated chip with an expected chip. Additionally, a designer may be provided with a set of results from which an updated chip design is created.
    Type: Application
    Filed: August 11, 2014
    Publication date: November 27, 2014
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Yu CAO, Wenjin SHAO, Ronaldus Johannes Gijsbertus GOOSSENS, Jun YE, James Patrick KOONMEN
  • Patent number: 8874423
    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.
    Type: Grant
    Filed: October 28, 2013
    Date of Patent: October 28, 2014
    Assignee: ASML Netherlands B.V.
    Inventors: Yu Cao, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen
  • Patent number: 8806387
    Abstract: Systems and methods for process simulation are described. The methods may use a reference model identifying sensitivity of a reference scanner to a set of tunable parameters. Chip fabrication from a chip design may be simulated using the reference model, wherein the chip design is expressed as one or more masks. An iterative retuning and simulation process may be used to optimize critical dimension in the simulated chip and to obtain convergence of the simulated chip with an expected chip. Additionally, a designer may be provided with a set of results from which an updated chip design is created.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 12, 2014
    Assignee: ASML Netherlands B.V.
    Inventors: Yu Cao, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen
  • Publication number: 20140046646
    Abstract: Systems and methods for tuning photolithographic processes are described. A model of a target scanner is maintained defining sensitivity of the target scanner with reference to a set of tunable parameters. A differential model represents deviations of the target scanner from the reference. The target scanner may be tuned based on the settings of the reference scanner and the differential model. Performance of a family of related scanners may be characterized relative to the performance of a reference scanner. Differential models may include information such as parametric offsets and other differences that may be used to simulate the difference in imaging behavior.
    Type: Application
    Filed: October 28, 2013
    Publication date: February 13, 2014
    Applicant: ASML NETHERLANDS B.V.
    Inventors: Yu CAO, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen
  • Publication number: 20090300573
    Abstract: Systems and methods for process simulation are described. The methods may use a reference model identifying sensitivity of a reference scanner to a set of tunable parameters. Chip fabrication from a chip design may be simulated using the reference model, wherein the chip design is expressed as one or more masks. An iterative retuning and simulation process may be used to optimize critical dimension in the simulated chip and to obtain convergence of the simulated chip with an expected chip. Additionally, a designer may be provided with a set of results from which an updated chip design is created.
    Type: Application
    Filed: May 29, 2009
    Publication date: December 3, 2009
    Inventors: Yu Cao, Wenjin Shao, Ronaldus Johannes Gijsbertus Goossens, Jun Ye, James Patrick Koonmen