Abstract: Apparatuses, systems, methods, and computer program products are disclosed for providing a preliminary ready indication for non-volatile memory. A non-volatile memory element initiates a write operation for one or more storage cells of the non-volatile memory element. The non-volatile memory element determines whether a progress threshold is satisfied for the write operation. The non-volatile memory element provides a preliminary ready indication, indicating that the progress threshold is satisfied.

Abstract: A data storage device includes a memory including a plurality of storage elements. The data storage device further includes a controller coupled to the memory. The controller includes an error correction code (ECC) engine. The controller further includes a reliability engine configured to access historical bit error data. The historical bit error data includes a first count of bit errors associated with a first set of storage elements of the plurality of storage elements. The reliability engine is configured to generate reliability information based on the historical bit error data and to provide the reliability information to the ECC engine.

Abstract: A data storage device includes a memory including a plurality of storage elements. The data storage device further includes a controller coupled to the memory. The controller includes an error correction code (ECC) engine. The controller further includes a reliability engine configured to access historical bit error data. The historical bit error data includes a first count of bit errors associated with a first set of storage elements of the plurality of storage elements. The reliability engine is configured to generate reliability information based on the historical bit error data and to provide the reliability information to the ECC engine.

Abstract: A device may include a first core, a master clock core, and a clock gating circuit. The master clock core may generate a master clock signal. The clock gating circuit may clock gate the master clock signal in response to a stall signal from the first core.

Abstract: A system, computer program product and a system for analysis of data, the method includes: extracting a concise representation of a content a sample of a first dataset, wherein the extracting is executed without being mainly based on a-priory knowledge of a content of the sample of the first dataset; querying a queried dataset using at least a portion of the concise representation of the content of the sample of the first dataset, to provide query results; and generating a concise representation of a content of the query results.

Abstract: A method and a non-transitory computer readable medium, the method includes receiving by a computerized system information about a large number of investment opportunities; wherein each investment opportunity exhibits investment characteristics and is formed from a financial asset; comparing in real time, by the computerized system, between characteristics of investment opportunities and characteristics of a large amount of investment portfolios to find investment opportunities that match investment portfolios; and adding investment opportunities to investment portfolios that match the investment opportunities

Abstract: A system, computer program product and a system for analysis of data, the method includes: extracting a concise representation of a content a sample of a first dataset, wherein the extracting is executed without being mainly based on a-priory knowledge of a content of the sample of the first dataset; querying a queried dataset using at least a portion of the concise representation of the content of the sample of the first dataset, to provide query results; and generating a concise representation of a content of the query results.

Abstract: Increased capacity of a NAND flash memory may be achieved by increasing the availability of non-defective physical blocks by allowing logical super blocks to have physical blocks with different associated position numbers within the physical blocks' respective planes. A flash memory module has one or more flash memory integrated circuits (ICs), each having multiple physical blocks. The physical blocks are grouped into planes characterized in that only physical blocks from different planes can be erased simultaneously. Embodiments of the invention include a method of managing the physical blocks of the flash memory, a flash memory system for managing data transfer between a host and the flash memory ICs, and a machine readable storage medium containing instructions for a controller in the management of physical blocks of flash memory.