Abstract: A time constant calibration device includes: a first voltage generating circuit utilizing a first current passing through a capacitive component to generate a first voltage; a second voltage generating circuit utilizing a second current passing through a resistive component to generate a second voltage; and a comparing circuit for comparing the first voltage with the second voltage to generate a comparing signal, wherein the first voltage generating circuit comprises an analog adjusting component for adjusting the first voltage according to the comparing signal until the first voltage is equal to the second voltage whereby an RC time constant defined by an equivalent capacitance corresponding to the first current passing through the capacitive component and an equivalent impedance corresponding to the second current passing through the resistive component reaches a predetermined value.

Abstract: An automatic switching phase-locked loop (PLL) is disclosed, including a phase detector, a charge pump generating a pump current, a band selector receiving a control voltage to produce a band selection signal and a voltage setting signal based the control voltage, a loop filter generating the control voltage corresponding to the pump current and setting the control voltage based on the voltage setting signal, and a multi-band voltage control oscillator (VCO) coupled to the control voltage and the band selection signal, selecting one of a plurality of operating bands based on the band selection signal, and providing an output signal of a frequency within the selected operating band based on the control voltage.

Abstract: A shift register is for generating scan signals. Each stage of the shift register comprises a first level lifting unit and at least a second level lifting unit, a first level lowering unit and at least a second level lowering unit, first and second driving units. The first level lowering and lifting units are for controlling the levels of signals at the first output terminal to output a first scan signal. The second level lowering unit and second level lifting unit are for controlling the levels of signals at the second output terminal to output at least a second scan signal. The first and second driving units are for turning on and off the first and the second level lifting units and the first and the second level lowering unit to control the first and second scan signals.

Abstract: An automatic switching phase-locked loop (PLL) is disclosed, including a phase detector, a charge pump generating a pump current, a band selector receiving a control voltage to produce a band selection signal and a voltage setting signal based the control voltage, a loop filter generating the control voltage corresponding to the pump current and setting the control voltage based on the voltage setting signal, and a multi-band voltage control oscillator (VCO) coupled to the control voltage and the band selection signal, selecting one of a plurality of operating bands based on the band selection signal, and providing an output signal of a frequency within the selected operating band based on the control voltage.

Abstract: A frequency comparator comparing frequencies of a first clock signal and a reference clock signal. The frequency comparator includes a phase-frequency detector and a comparison module. The phase-frequency detector receives the first clock signal and the reference clock signal, and outputs an up clock signal and a down clock signal. The pulse-width difference between the up clock signal and the down clock signal corresponds to the phase difference between the first clock signal and the reference clock signal. The comparison module compares the frequencies of the first clock signal and the reference clock signal based on how many times the pulse width of the up clock signal is larger or shorter than that of the down clock signal in a predetermined period.

Abstract: A multi-domain liquid crystal display includes a plurality of first and second picture elements having polarities opposite to each other under the same frame of an inversion drive scheme. Each first picture element has an extension part positioned next to at least one side of the adjacent second picture element, and each second picture element has an extension part positioned next to at least one side of the adjacent first picture element.

Abstract: A shift register has shift register units. The nth shift register unit includes first to third level control units and first and second driving units. The first and second level control units respectively provide a first clock signal and a first voltage to an output terminal. The first driving unit and the first level control unit are coupled to a first node, and a voltage on the first node is a first control signal. The first driving unit turns on and off the first level control unit in response to an input signal and second and third control signals. The second driving unit turns on and off the second level control unit in response to the first control signal. The third level control unit provides the first voltage to the output terminal in response to a front edge of the first control signal of the (n+2)th shift register unit.

Abstract: A flat display structure includes a substrate, a pixel array, a first-stage shift register and a second-stage shift register. The substrate includes a signal line. The pixel array is disposed on the substrate. The first-stage shift register is disposed at a first side of the pixel array and coupled to the signal line for outputting a first-stage scan signal to the pixel array according to trigger of a first start pulse. The second-stage shift register is disposed at a second side of the pixel array and coupled to the signal line for receiving a second start pulse via the signal line.

Abstract: A frequency comparator is disclosed, comparing frequencies of a first clock signal and a reference clock signal, comprising a phase-frequency detector and a comparison module. The phase-frequency detector receives the first clock signal and the reference clock signal, outputting an up clock signal and a down clock signal, wherein the pulse-width difference between the up clock signal and the down clock signal corresponds to the phase difference between the first clock signal and the reference clock signal. The comparison module compares the frequencies of the first clock signal and the reference clock signal based on how many times the pulse width of the up clock signal is larger or shorter than that of the down clock signal in a predetermined period.

Abstract: A multi-domain liquid crystal display includes a plurality of first and second picture elements and a plurality of first and second auxiliary electrodes. The first and second picture elements have opposite polarities under the same frame of an inversion drive scheme. The first auxiliary electrodes are connected to the first picture elements and at least partially surround each of the second picture elements, and the second auxiliary electrodes are connected to the second picture elements and at least partially surround each of the first picture elements.

Abstract: A driving circuit of active matrix organic electroluminescence diode is disclosed. Each pixel includes three TFTs and two capacitors. A gate of scan reset TFT is controlled by the scan line of the row where the pixel is located and a drain of scan reset TFT is connected to the data line of the column where the pixel is situated. Detect TFT is controlled by one Threshold-Lock line. One capacitor Cd is used to store data voltage (Vdata) of image signals and the other capacitor Ct is used to store the threshold voltage (Vth) of driving TFT. Therefore, the sum of capacitors Cd and Ct will drive the driving TFT to output the corresponding current to the organic electroluminescence element.

Abstract: The present invention discloses a delay-locked loop device capable of anti-false-locking, which comprises: a voltage control delay circuit comprising a plurality of delay units in a series for generating a delayed phase according to a reference phase and a control voltage; a phase detector coupled to the voltage control delay circuit for generating a control signal according to a lock indication signal, the reference phase, and the delayed phase; a charge pump coupled to the phase detector for transmitting the control voltage to the voltage control delay circuit according to the control signal; and a lock detector coupled to the voltage control delay circuit for generating the lock indication signal for the phase detector according to output phases of at least one delay unit of the voltage control delay circuit.

Abstract: The invention features methods of screening for compounds that prevent and/or reduce UVB-induced skin damage, e.g., wrinkles. The method includes identifying an agent that increases or induces the expression, activity or levels of a component of the p21 signal transduction pathway. Also included are methods and compositions for treating UVB-induced skin damage.

Abstract: The present invention discloses a delay-locked loop device capable of anti-false-locking, which comprises: a voltage control delay circuit comprising a plurality of delay units in a series for generating a delayed phase according to a reference phase and a control voltage; a phase detector coupled to the voltage control delay circuit for generating a control signal according to a lock indication signal, the reference phase, and the delayed phase; a charge pump coupled to the phase detector for transmitting the control voltage to the voltage control delay circuit according to the control signal; and a lock detector coupled to the voltage control delay circuit for generating the lock indication signal for the phase detector according to output phases of at least one delay unit of the voltage control delay circuit.

Abstract: A driving circuit of active matrix organic electroluminescence diode is disclosed. Each pixel includes three TFTs and two capacitors. A gate of scan reset TFT is controlled by the scan line of the row where the pixel is located and a drain of scan reset TFT is connected to the data line of the column where the pixel is situated. Detect TFT is controlled by one Threshold-Lock line. One capacitor Cd is used to store data voltage (Vdata) of image signals and the other capacitor Ct is used to store the threshold voltage (Vth) of driving TFT. Therefore, the sum of capacitors Cd and Ct will drive the driving TFT to output the corresponding current to the organic electroluminescence element.

Abstract: The present invention provides methods and compositions for modulating skin pigmentation.

Abstract: The present invention relates to an uniformly active light emitting diode drive circuit. This invention provides a 3T1C circuit structure in the emitting pixel and an additional data capacitors connecting to all the pixels are picked out and located on one side of the display panel. In addition, the connecting lines to the OLED on every pixel are all collected to one end of a transistor Moc on the other side of the display panel. Through the arrangement, it is intended that the aperture ratio of the organic electroluminescent (OLED) device can be largely improved. Moreover, an additional by-pass current transistor in parallel with data capacitor (Cd) in a data generator region outside of the pixel array can by-pass the previous left current in the circuit and thus enhance the contrast ratio of the emitting pixel.

Abstract: An apparatus for improving yields and uniformity of active matrix organic light emitting diode (AMOLED) panels mainly adds a ballast resistor between a drive transistor and an organic light emitting diode (OLED) of each pixel. The ballast resistor can prevent short circuit of the drive transistor or excessive drive current in the pixel, and prevent the voltage source and the common electrode from directly occurring short circuit together when the OLED has occurred short circuit thereby improve yields and uniformity of the panel.

Abstract: The invention features methods of screening for compounds that prevent and/or reduce UVB-induced skin damage, e.g., wrinkles. The method includes identifying an agent that increases or induces the expression, activity or levels of a component of the p21 signal transduction pathway. Also included are methods and compositions for treating UVB-induced skin damage.

Abstract: The present invention relates to an uniformly active light emitting diode drive circuit. This invention provides a 3T1C circuit structure in the emitting pixel and an additional data capacitors connecting to all the pixels are picked out and located on one side of the display panel. In addition, the connecting lines to the OLED on every pixel are all collected to one end of a transistor Moc on the other side of the display panel. Through the arrangement, it is intended that the aperture ratio of the organic electroluminescent (OLED) device can be largely improved. Moreover, an additional by-pass current transistor in parallel with data capacitor (Cd) in a data generator region outside of the pixel array can by-pass the previous left current in the circuit and thus enhance the contrast ratio of the emitting pixel.