Abstract: An opto-electronic element includes a header and an opto-electronic chip. The header have a metal stem and an insulating structure, and the opto-electronic chip located on the stem or insulating structure. The opto-electronic chip is grown with an epitaxy layer structure on a thicker and homogeneous electroconductive base, and the electrodes are located on the same side and have the same metal structure. Thus, the chip is located on the insulating structure and isolated from each electrode, and the chip and header are kept in an insulated state. Furthermore, an auxiliary pin for supporting the chip and for forming an open circuit or serving as an electrode of the chip is located in an axial direction of the insulating structure. The combination of the stem and insulating structure may be replaced with a non-metal stem with a corresponding shape, and a periphery of the non-metal stem may further have an extended wall portion combined with a cap to form the opto-electronic element.

Abstract: An optoelectronic component and an optical sub-assembly for optical communication. The optoelectronic component has a housing and one end formed with an opening. An optoelectronic device is located in the housing and faces the opening. A barrel is combined with the optoelectronic component to form the optical sub-assembly, and the barrel has a lens configuration facing the opening. The lens can enter the housing through the opening to approach the optoelectronic device. Thus, the manufacturing costs of the optoelectronic component and the optical sub-assembly can be lowered, and the optical coupling efficiency of the optical sub-assembly can be enhanced. In addition, a film covers the surface of the optoelectronic device to improve the device reliability.

Abstract: An optical sub-assembly module includes a receptacle combined with a light emitting device. The receptacle includes an optical axis, a coupling structure is aligned with the optical axis. The light emitting device includes a outer seal and a light emitting chip disposed in the outer seal. An open aperture is formed in the surface of the outer seal and opposite to the light emitting chip, and a transparent surface of the light emitting chip is a flat structure without lens. Therefore, the light beam emitted from the light emitting chip does not pass through any micro lens, and the light beam between the light emitting chip and the coupling structure is not refracted.

Abstract: An optical sub-assembly module includes a receptacle combined with a light emitting device. The receptacle includes an optical axis, a coupling structure is aligned with the optical axis. The light emitting device includes a outer seal and a light emitting chip disposed in the outer seal. An open aperture is formed in the surface of the outer seal and opposite to the light emitting chip, and a transparent surface of the light emitting chip is a flat structure without lens. Therefore, the light beam emitted from the light emitting chip does not pass through any micro lens, and the light beam between the light emitting chip and the coupling structure is not refracted.

Abstract: An optical sub-assembly module comprises a receptacle combined with a light emitting device. The receptacle has an optical axis and a one-piece condensing device with a dual lens structure and aligning with the optical axis. The light emitting device is either a traditional LED, a laser diode, a light emitting component with a TO-CAN structure, or a photo detector (PD). The light may radiate through an opening in the pervious direction of the outer seal of each light emitting device. The pervious side of the light emitting chip in each light emitting device may be designed without micro lenses. The optical sub-assembly module is capable of improving the light coupling effect with the one-piece dual lens structure in the receptacle. The combination process of the receptacle and the light emitting device is compatible with the existing process. Each light emitting device has an opening at its outer seal end and a light emitting chip without micro lens structure to lower production costs.

Abstract: The present invention pertains to an integrated surface-emitting optoelectronic module and the method for making the same. The yellow light procedure is performed to define a V-groove width for disposing an optical fiber on a silicon substrate. After dry etching a vertical groove, a dielectric layer is grown on the surface of the silicon substrate to protect the vertical wall, preventing the groove from getting wider due to subsequent wet etching. A 45-degree mirror surface is formed so that an optoelectronic device can be disposed on the mirror surface in the flip chip method. The optoelectronic module employs a complete silicon substrate to assemble a surface-emitting optoelectronic devices and an optical fiber by passive alignment, and therefore can be free from misalignment due to separate assembly.

Abstract: A partial reflective laser output device comprising a partial reflective unit mounted on a laser output device (such as a vertical cavity emitting laser), the partial reflective unit allowing the laser beam emitted from the laser output device to be partially reflected while the rest penetrating through. On one hand, this device decreases the intensity of output laser light so as to comply with the eye safety standard; the reflected light is absorbed by a photodiode (PD) to perform auto power control on the laser output device on the other. In addition, by adjusting the tilting angle of the partial reflective unit or making a curvature thereon, the reflected light can have no destructive interference with the output light and can even be focused onto the PD so that there would be no relative intensity noise problem and the size of the PD can be made smaller to lower the cost.

Abstract: A manufacturing method for edge-emitting or edge-coupled waveguide optoelectronic devices (such as edge-emitting waveguide laser diodes or edge-coupled waveguide photodiodes). The method uses a high density plasma (HDP) reactive ion etching (RIE) technique to etch the semiconductor layer of an optoelectronic device at wafer level to form facets for light to go in or out. One can then coat the facets before chipping a wafer, thus avoiding the trouble of cleaving the wafer into bars as in the prior art. This method can increase the efficiency and reliability of devices and lower the manufacturing cost.

Abstract: The present invention pertains to an integrated surface-emitting optoelectronic module and the method for making the same. The yellow light procedure is performed to define a V-groove width for disposing an optical fiber on a silicon substrate. After dry etching a vertical groove, a dielectric layer is grown on the surface of the silicon substrate to protect the vertical wall, preventing the groove from getting wider due to subsequent wet etching. A 45-degree mirror surface is formed so that an optoelectronic device can be disposed on the mirror surface in the flip chip method. The optoelectronic module employs a complete silicon substrate to assemble a surface-emitting optoelectronic devices and an optical fiber by passive alignment, and therefore can be free from misalignment due to separate assembly.

Abstract: This specification discloses a structure of a ridge waveguide semiconductor laser and a self-alignment method of making the same. The structure comprises a ridge whose top surface is exposed to have direct contact with a metal electrode layer so as to lower the ohmic contact resistance. Two side walls of the ridge and two channels are covered by a dielectric layer with high thermal conductivity, and the peripheral platform surfaces are covered by another dielectric layer with low capacitance. Therefore, the obtained laser diode has features such as high heat dissipation and low capacity. In the manufacturing process, the ridge can have good ohmic contact with metal electrodes without the need of aligned contact holes. The end-point detector is used in the key step to perform precision control. A reactive ion etching (RIE) machine can be employed in the processes to perform large area homogeneous etching so that the laser devices require a lower manufacturing cost but obtain a higher yield.

Abstract: A self-aligned method for fabricating a ridge-waveguide semiconductor laser uses two photoresist layers in the process. The lower one is photoresist ODUR1013, and the upper one is photoresist AZ5214E. The lower photoresist layer, ODUR1013, can only be developed by light of wavelength less than 300 nm, and the upper photoresist layer, AZ5214E, can only be developed by light of wavelength greater than 300 nm. In the process of forming an opening on the top of the ridge structure, a G-line mask aligner is used to develop the upper photoresist AZ5214E and to expose the lower photoresist ODUR1013. Then, by performing a reactive ion etching (RIE) process, the lower photoresist ODUR1013 and the dielectric within the opening are removed. The remains of the upper photoresist layer, AZ5214E, are used to protect the sidewalls of the ridge structure in the RIE process.