Patents by Inventor Rong Jiang

Rong Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240136984
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Application
    Filed: November 6, 2023
    Publication date: April 25, 2024
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20240131086
    Abstract: The present disclosure provides use of Clostridium ghonii combined with a tumor angiogenesis inhibitor in preparing a pharmaceutical product for treating a tumor. The present disclosure further provides a drug for treating a tumor, where the drug includes active ingredients of Clostridium ghonii and a tumor angiogenesis inhibitor.
    Type: Application
    Filed: October 9, 2022
    Publication date: April 25, 2024
    Inventors: Yong Wang, Yuanyuan Liu, Wenhua Zhang, Yanqiu Xing, Shaopeng Wang, Dan Wang, Hong Zhu, Xinglu Xu, Shengbiao Jiang, Xiaonan Li, Jiahui Zheng, Rong Zhang, Dongxia Yang, Yuxia Gao, Shili Shao, Ting Han
  • Publication number: 20240125128
    Abstract: This invention discloses digitally printed plate, the manufacturing method and applications thereof, is characterized in that the digitally printed plate is of respectively from top to bottom surface lacquer layer, texture layer, second wear layer, first wear layer, pattern layer, bottom lacquer layer, base layer. The digitally printed plated has various patterns, with sufficient materials, printing unrepeatable stereoscopic pattern is possible, so it can satisfy customers' personalized customization requirements, without wasting abundant time or cost, and with process reduced, production efficiency is improved, enabling order manufacturing order insert and sample making at any time.
    Type: Application
    Filed: March 24, 2021
    Publication date: April 18, 2024
    Inventors: Jun Yuan, Quanshan Cheng, Juan Chen, Haiqing Qian, Rong Jiang, Yuan Liu
  • Publication number: 20240126948
    Abstract: A numerical simulation optimization method of impact damage based on a laser mapped solid mesh is provided, including: measuring an impact damage size, a damage profile, a surface residual strain and a surface residual stress of a solid mesh element around the damage after firing a bullet by a light gas gun to impact a mesh area of a sample and obtaining the impact damage; establishing a parameterized impact finite element model to obtain a numerically simulated impact damage size, a numerically simulated impact damage profile, a numerically simulated surface residual strain and the surface residual stress of the surface solid mesh element; and calculating relative errors between the experimental measurements and the numerically simulated impact damage size, damage profile, surface residual strain and residual stress; and determining whether the relative errors are all less than expected values until a numerical simulation result meeting the accuracy requirements are obtained.
    Type: Application
    Filed: December 29, 2022
    Publication date: April 18, 2024
    Applicant: NANJING UNIVERSITY OF AERONAUTICS AND ASTRONAUTICS
    Inventors: Xu JIA, Yingdong SONG, Rong JIANG, Dawei WANG
  • Publication number: 20240130022
    Abstract: This application relates to the field of lighting, and discloses an LED filament. The LED filament includes an LED chip unit, a light conversion layer, and an electrode. The light conversion layer covers the LED chip unit and part of the electrode, and a color of a light emitted by the LED filament after lighting is different from a color of the light conversion layer. This application has the characteristics of uniform light emission and good heat dissipation effect.
    Type: Application
    Filed: September 18, 2022
    Publication date: April 18, 2024
    Inventors: Tao Jiang, Lin Zhou, Ming-Bin Wang, Chih-Shan Yu, Rong-Huan Yang, Ji-Feng Xu, Heng Zhao, Jian Lu, Qi Wu
  • Publication number: 20240115627
    Abstract: The present disclosure relates to use of a Clostridium ghonii spore combined with pembrolizumab in cancer treatment. It is found for the first time that the Clostridium ghonii spore combined with pembrolizumab can significantly improve a curative effect of colon cancer and reduce a dose of the pembrolizumab, and thus is efficient and low-toxic. Oncolysis by Clostridium ghonii can affect immunogenicity of a tumor microenvironment (TME) by various ways, converts an immunosuppressive state of the TME into an immune-activated state, adjusts the immunosuppressive TME, and breaks an immune tolerance. An optimal combination of the Clostridium ghonii spore and the pembrolizumab thoroughly removes about 20% of mouse tumor tissues. A benefit range of patients with tumors treated by a PD-1 antibody is expanded. The combination even has an obvious curative effect on patients failed the treatment by the PD-1 antibody.
    Type: Application
    Filed: October 9, 2022
    Publication date: April 11, 2024
    Inventors: Yong Wang, Hong Zhu, Wenhua Zhang, Yanqiu Xing, Dan Wang, Yuanyuan Liu, Shaopeng Wang, Jiahui Zheng, Rong Zhang, Xiaonan Li, Xinglu Xu, Shengbiao Jiang, Lichao Xing, Yuxia Gao, Shili Shao, Ting Han
  • Patent number: 11923883
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Grant
    Filed: January 25, 2023
    Date of Patent: March 5, 2024
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Patent number: 11894809
    Abstract: Methods and devices for amplifying an input RF signal according to at least two gain-states is described. According to one aspect, a multi gain amplifier circuit including a low noise amplifier having a stack of transistors is used for amplification of the input RF signal. When switching from a low gain-state to a high gain-state, the drain-to-source voltage of the output transistor of the stack is increased to affect region of operation of the output transistor, and thereby reduce non-linearity at the output of the amplifier. When switching from the high gain-state to the low gain-state, the drain-to-source voltage of the input transistor of the stack is increased to affect region of operation of the input transistor, and thereby reduce non-linearity at the output of the amplifier.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: February 6, 2024
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Haopei Deng
  • Publication number: 20230387863
    Abstract: Feedback methods and devices to reduce gain in RF amplifiers, more in particular LNAs, are disclosed. The described methods are based on providing feedback paths from the drain terminal of one of the LNA cascode transistors to the source terminal of the LNA input transistor, or from the gate terminal of the input transistor to the source terminal of the LNA input transistor. The disclosed methods can be combined with one another or with existing feedback methods to provide further flexibility and improved tradeoffs when designing LNAs for applications having different requirements.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Parvez DARUWALLA, Rong JIANG, Khushali SHAH
  • Patent number: 11817830
    Abstract: Compact low noise amplifiers that have wide-band coverage while meeting necessary input matching and output matching characteristics. Embodiments include a wide-band, two-stage LNA with minimum degradation in performance compared to multiple narrow-band, single-stage LNAs. A generalized embodiment includes a first amplifier stage having a terminal coupled to a mutually coupled inductor circuit and to a second amplifier stage. The second amplifier stage includes a terminal coupled to the mutually coupled inductor circuit. The mutually coupled inductor circuit comprises electromagnetically coupled inductors L1, L2. Second terminals of the first and second amplifier stages are coupled to respective degeneration inductors. The electromagnetically coupled inductors L1, L2 of the inductor circuit substantially increase the output bandwidth of the LNA with minimum degradation in performance.
    Type: Grant
    Filed: May 24, 2022
    Date of Patent: November 14, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20230291360
    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
    Type: Application
    Filed: March 16, 2023
    Publication date: September 14, 2023
    Inventors: Rong Jiang, Khushali Shah, Ravindranath D. Shrivastava, Parvez H. Daruwalla
  • Publication number: 20230291368
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Application
    Filed: March 28, 2023
    Publication date: September 14, 2023
    Inventors: Rong JIANG, Khushali SHAH
  • Publication number: 20230283245
    Abstract: Circuit and methods using a single low-noise amplifier (LNA) to provide amplification for a wide band of RF frequencies while maintaining high gain and a low noise factor. Embodiments include an amplifier circuit including an input signal path for receiving a wideband RF signal; a switched inductor tuning block coupled to the input signal path and configured to selectively couple one of a plurality of inductances to the input signal path; and an amplifier coupled to the switched inductor tuning block and configured to receive the RF signal after passage through the selected coupled inductance. The switched inductor tuning block includes a plurality of selectable branches, each including an RF input switch; an RF output switch; an inductor coupled between the RF input switch and the RF output switch; and first and second shunt switches coupled between a respective terminal of the inductor and circuit ground.
    Type: Application
    Filed: March 7, 2023
    Publication date: September 7, 2023
    Inventors: Rong Jiang, Khushali Shah
  • Publication number: 20230238995
    Abstract: A clamping circuit that may be used to provide efficient and effective voltage clamping in an RF front end. The clamping circuit comprises two series coupled signal path switches and a bypass switch coupled in parallel with the series coupled signal path switches. A diode is coupled from a point between the series coupled signal path switches to a reference potential. In addition, an output selection switch within an RF front end has integrated voltage clamping to more effectively clamp the output voltage from the RF front end. Additional output clamping circuits can be used at various places along a direct gain signal path, along an attenuated gain path and along a bypass path.
    Type: Application
    Filed: January 25, 2023
    Publication date: July 27, 2023
    Inventors: Rong Jiang, Khushali Shah, Peter Bacon
  • Publication number: 20230207852
    Abstract: Provided in this patent disclosure are a novel titanium redox flow battery having a nitrogen-enriched catalyst, and a binary redox flow battery comprised of one unit that converts electricity into chemical energy to be stored in electrolytes and a separate second unit that converts the chemical energy from electrolytes back into electricity.
    Type: Application
    Filed: December 23, 2022
    Publication date: June 29, 2023
    Inventor: Rong Jiang
  • Publication number: 20230168948
    Abstract: Disclosed are a routing information transmission method and apparatus, and a communication system, and belong to the field of communication technologies. The routing information transmission method is applied to a system including data middleware and a routing information base (RIB), and the data middleware communicates with the RIB. The data middleware may obtain routing information from the RIB, and send the routing information obtained from the RIB to a third-party consumer device. In addition, the data middleware may also obtain routing information from a third-party producer device, and send the routing information obtained from the third-party producer device to the RIB. Therefore, according to technical solutions provided herein, the routing information included in the RIB is openly exported, and the routing information generated by the third-party producer device is imported into the RIB.
    Type: Application
    Filed: January 27, 2023
    Publication date: June 1, 2023
    Inventors: Haijun Xu, Feng Guo, Xudong Zhang, Rong Jiang, Peng Zhang
  • Publication number: 20230145397
    Abstract: Provided in this patent disclosure are two types of novel fluoro-monomers that can be polymerized for the fabrication of ion-exchange fluoropolymers. In addition, new proton-conductive zirconium-perfluorophosphonic acid fluoropolymer membranes that can reduce metal crossovers in redox flow batteries are also provided.
    Type: Application
    Filed: December 21, 2020
    Publication date: May 11, 2023
    Inventors: Yong Gao, Rong Jiang
  • Patent number: 11646703
    Abstract: Methods and devices to implement efficiently an AUX terminal in RF front end receivers using LNAs are described. The described methods implement a smaller number of switches resulting in an overall performance improvement by reducing the noise figure at the input of the LNA. The presented devices can be used in low/high gain and bypass modes and can accommodate an arbitrary number of bands over a wide frequency range.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: May 9, 2023
    Assignee: PSEMI CORPORATION
    Inventors: Rong Jiang, Khushali Shah
  • Patent number: 11616475
    Abstract: Circuits and methods for improving the noise figure (NF) of an amplifier, particularly an LNA, in high-gain modes while improving the IIP3 of the amplifier in low-gain modes. The source of an amplifier common-source FET is coupled to circuit ground thorough a degeneration circuit comprising a two-port inductor and a bypass switch coupled in parallel with the inductor. A switched feedback circuit is coupled between the gate of the common-source FET and a feedback node in the amplifier output signal path. During a low gain mode, the inductor is entirely bypassed and the enabled feedback circuit lowers the input impedance of the common-source FET and reduces the gain of the amplifier circuit, essentially eliminating the need for a degeneration inductor. During a high gain mode, the source of the common-source FET is coupled to circuit ground through the inductor and the feedback circuit is disabled. Other gain modes are supported.
    Type: Grant
    Filed: January 5, 2021
    Date of Patent: March 28, 2023
    Assignee: pSemi Corporation
    Inventors: Rong Jiang, Khushali Shah, Ravindranath D. Shrivastava, Parvez Daruwalla
  • Publication number: 20230090460
    Abstract: Methods and devices to support multiple gain states in amplifiers are described. The methods and devices are based on implementing a feedback element in the amplifier and adjusting the impedance of the feedback element to provide a desired gain while maintaining the overall performance of the amplifier and reducing degradation of the S12 parameter. The feedback element includes an adjustable attenuator and a tunable resistive element. The adjustable attenuator is provided in a path that is common to the feedback path and the bypass path of the amplifier. Exemplary implementations of adjustable attenuators are also presented.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 23, 2023
    Inventors: Rong JIANG, Parvez DARUWALLA, Khushali SHAH