Abstract: A compound having a structure as shown in general formula (I), a deuterated compound, a stereoisomer, or a pharmaceutically acceptable salt thereof, a pharmaceutical composition comprising same, and use thereof. The compound has a good PIM kinase inhibitory effect, is a novel and ideal PIM inhibitor having high activity and low toxicity, and can be used for treating and/or preventing hematoma such as acute myeloid leukemia, bone marrow fibrosis and chronic lymphocytic leukemia, solid tumors such as gastric cancer and prostate cancer, and other diseases.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: A method for preparing high molecular weight polybutylene succinate includes: (a) using maleic anhydride (MAH) and C1-C4 alcohols to produce dialkyl maleates and water, in which dialkyl fumarate is calculated as dialkyl maleate of an equivalent mole. A reactive distillation process is used for the purification and obtains dialkyl maleates; (b) selective hydrogenation of those dialkyl maleates in the presence of high pressure hydrogen to produce the corresponding dialkyl succinates; (c) condensation of dialkyl succinates with mostly 1,4-butanediol (BDO) and other aliphatic diols to produce high molecular weight polybutylene succinates by adding catalysts.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: A system and method for extracting a skeleton topology structure for an electric power grid, the method comprising: receiving a description of a topology sub-structure corresponding with user's need and a description of skeleton topology sub-structure extracted from the topology sub-structure; generating a first incidence matrix based on the description of the topology sub-structure and a second incidence matrix based on the description of the skeleton topology sub-structure; generating a third incidence matrix based on a primary topology structure of electric power grid; searching from the third incidence matrix a sub-matrix that matches the first incidence matrix; obtaining a fourth incidence matrix by using the second incidence matrix to transform the matching sub-matrix; and generating a skeleton topology structure corresponding to the primary topology structure based on the fourth incidence matrix.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: Pattern centric process control is disclosed. A layout of a semiconductor chip is decomposed into a plurality of intended circuit layout patterns. For the plurality of intended circuit layout patterns, a corresponding plurality of sets of fabrication risk assessments corresponding to respective ones of a plurality of sources is determined. Determining a set of fabrication risk assessments for an intended circuit layout pattern comprises determining fabrication risk assessments based at least in part on: simulation of the intended circuit layout pattern, statistical analysis of the intended circuit layout pattern, and evaluation of empirical data associated with a printed circuit layout pattern. A scoring formula is applied based at least in part on the sets of fabrication risk assessments to obtain a plurality of overall fabrication risk assessments for respective ones of the plurality of intended circuit layout patterns.

Abstract: A system for adjusting a representation of a merchandise hierarchy associated with an entity such as a retailer or wholesaler of products. Product correlation information discovered in that entity's customers' shopping records are obtained and incorporated into an existing merchandise hierarchy with a constraint on the consistency with the existing hierarchy.

Abstract: A system and method for extracting a skeleton topology structure for an electric power grid, the method comprising: receiving a description of a topology sub-structure corresponding with user's need and a description of skeleton topology sub-structure extracted from the topology sub-structure; generating a first incidence matrix based on the description of the topology sub-structure and a second incidence matrix based on the description of the skeleton topology sub-structure; generating a third incidence matrix based on a primary topology structure of electric power grid; searching from the third incidence matrix a sub-matrix that matches the first incidence matrix; obtaining a fourth incidence matrix by using the second incidence matrix to transform the matching sub-matrix; and generating a skeleton topology structure corresponding to the primary topology structure based on the fourth incidence matrix.

Abstract: A data integration module is operable to integrate a plurality of data sources, a customer preference module builds a model representing preference to different channels in merchandise category for each customer segment. A customer satisfaction module creates a model representing customer satisfaction metrics. A joint multi-channel optimization module is operable to use an optimization model that utilizes the customer preference model and the customer satisfaction model and maximize retailer's profit and customer satisfaction.

Abstract: A topology structure of a power system is acquired. At least one unification set in the power system is identified based on the topology structure. Devices belonging to the same unification set have the same outage state. The at least one unification set is recorded, so as to concurrently maintain devices belonging to the same unification set. Advantageously, one or more embodiments reduce number of outages caused by power system device maintenance.

Abstract: A system for detecting conflicts between a power supply guarantee request (PSGR) and an outage request (OR) in a power grid. The system comprises: an accompanying outage analysis device for receiving a first outage device set including OR related devices, and using geographic information about devices in the power grid to determine a second outage device set, the second outage device set including devices in the first outage device set and accompanying outage devices that need to be in outage together with the devices in the first outage device set; an outage scale determination device for using topology information about the power grid to determine a power grid outage scale in which all of the devices in the second outage device set can be in outage; and a conflict detection device for receiving a power supply guarantee device set including PSGR related devices, and judging, for each device in the power supply guarantee device set, whether the device is included in the power grid outage scale.

Abstract: A method detects conflicts between a power supply guarantee request (PSGR) and an outage request (OR) in a power grid. The method comprises receiving a first outage device set including OR related devices and a power supply guarantee device set including PSGR related devices. Geographic information about devices in the power grid is used to determine a second outage device set, which includes devices in the first outage device set and accompanying outage devices that need to be in outage together with devices in the first outage device set. Power grid topology information is used to determine a power grid outage scale in which all devices in the second outage device set can be in outage. For each device in the power supply guarantee device set, the method detects whether the device is included in the power grid outage scale, to determine any conflict between the PSGR and OR.

Abstract: A system, method and computer program product for providing the ability for retailers to devise a current channel strategy (e.g., adaptive price setting) that considers competitors in a dynamic competing environment, and that enables computing a competitive advantage of a channel. To estimate a price for selling a product j in a commerce channel comprises: a) receiving, at a processor device, real market data including sales and price history data of a product j sold by one or more retailers over one or alternate sales channels t; generating, by the processor device, a competitive advantage parameter value based on the sales and price history data; and, computing, utilizing the competitive advantage parameter value, an optimum price for a particular product to be marketed in one of the one or alternate sales channel.

Abstract: System, method and computer program product for adjusting a representation of a merchandise hierarchy associated with an entity such as a retailer or wholesaler of products. Product correlation information discovered in that entity's customers' shopping records are obtained and incorporated into an existing merchandise hierarchy with a constraint on the consistency with the existing hierarchy.

Abstract: A method detects conflicts between a power supply guarantee request (PSGR) and an outage request (OR) in a power grid. The method comprises receiving a first outage device set including OR related devices and a power supply guarantee device set including PSGR related devices. Geographic information about devices in the power grid is used to determine a second outage device set, which includes devices in the first outage device set and accompanying outage devices that need to be in outage together with devices in the first outage device set. Power grid topology information is used to determine a power grid outage scale in which all devices in the second outage device set can be in outage. For each device in the power supply guarantee device set, the method detects whether the device is included in the power grid outage scale, to determine any conflict between the PSGR and OR.

Abstract: A method for predicting sales for a new store in a certain geographical area is disclosed, the method comprising geographic and non-geographic information and customer segmentation in the area to estimate sales and optionally the impact on existing competitor stores.

Abstract: A system, method and computer program product for providing the ability for retailers to devise a current channel strategy (e.g., adaptive price setting) that considers competitors in a dynamic competing environment, and that enables computing a competitive advantage of a channel. To estimate a price for selling a product j in a commerce channel comprises: a) receiving, at a processor device, real market data including sales and price history data of a product j sold by one or more retailers over one or alternate sales channels t; generating, by the processor device, a competitive advantage parameter value based on the sales and price history data; and, computing, utilizing the competitive advantage parameter value, an optimum price for a particular product to be marketed in one of the one or alternate sales channel.