Patents by Inventor Ronghong Ye

Ronghong Ye has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11393715
    Abstract: Provided is a method for manufacturing a 14 nm-node BEOL 32 nm-width metal. A semiconductor structure for manufacturing BEOL wire is provided, wherein the semiconductor structure at least comprises a carbon coating and intermediate layer on it; forming a photoresist layer on the intermediate layer and exposing the photoresist layer according to a layout; developing the exposed photoresist layer by using a developing solution, and causing the developed photoresist to react with the intermediate layer in a contact region of the developed photoresist to form a peg groove; and etching by using the groove in the semiconductor structure to form a 14 nm-node BEOL 32 nm-width metal. This application can reducing the longitudinal shrink of the metal wire, achieving the improvement of the lateral and longitudinal shrink uniformity, reducing defects caused by misalignment of the through hole and the metal wire, and increasing the effective usable area of a chip.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: July 19, 2022
    Assignee: Shanghai Huali Integrated Circuit Corporation
    Inventors: Yongji Mao, Ronghong Ye, Liyao Liu, Yu Zhang, Zhanyuan Hu
  • Patent number: 11374102
    Abstract: The present disclosure relates to a FinFET and a manufacturing method of a contact. The manufacturing method comprises steps of: sequentially generating an interlayer dielectric layer, a metal hard mask, an oxide protective cap and a tri-layer mask on a gate to form a device to be etched; photoetching the tri-layer mask to remove photoresist in a non-patterned area; performing main etch on the device to be etched after the photoetching to remove the interlayer dielectric layer in the area that is not covered by the metal hard mask, and the metal hard mask is provided with the oxide protective cap; performing ODL removal on the device to be etched after the main etch to remove remaining part of the tri-layer mask; performing oxide etch on the device to be etched after the ODL removal to remove the oxide protective cap; and generating the contact on the device after the oxide etch. The present disclosure can accurately control the critical dimensions of the contact in an X direction and a Y direction.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: June 28, 2022
    Assignee: SHANGHAI HUALI INTEGRATED CIRCUIT MFG. CO., LTD.
    Inventors: Yongji Mao, Ronghong Ye, Liyao Liu, Yu Zhang, Zhanyuan Hu
  • Publication number: 20210305383
    Abstract: The present disclosure relates to a FinFET and a manufacturing method of a contact. The manufacturing method comprises steps of: sequentially generating an interlayer dielectric layer, a metal hard mask, an oxide protective cap and a tri-layer mask on a gate to form a device to be etched; photoetching the tri-layer mask to remove photoresist in a non-patterned area; performing main etch on the device to be etched after the photoetching to remove the interlayer dielectric layer in the area that is not covered by the metal hard mask, and the metal hard mask is provided with the oxide protective cap; performing ODL removal on the device to be etched after the main etch to remove remaining part of the tri-layer mask; performing oxide etch on the device to be etched after the ODL removal to remove the oxide protective cap; and generating the contact on the device after the oxide etch. The present disclosure can accurately control the critical dimensions of the contact in an X direction and a Y direction.
    Type: Application
    Filed: November 13, 2020
    Publication date: September 30, 2021
    Inventors: Yongji MAO, Ronghong Ye, Liyao Liu, Yu Zhang, Zhanyuan Hu
  • Publication number: 20210098282
    Abstract: Provided is a method for manufacturing a 14 nm-node BEOL 32 nm-width metal. A semiconductor structure for manufacturing BEOL wire is provided, wherein the semiconductor structure at least comprises a carbon coating and intermediate layer on it; forming a photoresist layer on the intermediate layer and exposing the photoresist layer according to a layout; developing the exposed photoresist layer by using a developing solution, and causing the developed photoresist to react with the intermediate layer in a contact region of the developed photoresist to form a peg groove; and etching by using the groove in the semiconductor structure to form a 14 nm-node BEOL 32 nm-width metal. This application can reducing the longitudinal shrink of the metal wire, achieving the improvement of the lateral and longitudinal shrink uniformity, reducing defects caused by misalignment of the through hole and the metal wire, and increasing the effective usable area of a chip.
    Type: Application
    Filed: April 21, 2020
    Publication date: April 1, 2021
    Applicant: Shanghai Huali Integrated Circuit Corporation
    Inventors: Yongji Mao, Ronghong Ye, Liyao Liu, Yu Zhang, Zhanyuan Hu