Abstract: A display panel, a displaying device and a wearable device. The display panel includes a displaying region and a peripheral region surrounding the displaying region, a region of the peripheral region other than the bonding sub-region includes a first testing-unit group and a second testing-unit group, and each of the first testing-unit group and the second testing-unit group includes one or more circuit testing units; the displaying region includes a first lateral side and a second lateral side that extend in a first direction and face each other, the first direction refers to a direction from the bonding sub-region pointing to the displaying region; and a maximum distance from the first testing-unit group to the first lateral side in a direction perpendicular to the first direction is equal to a maximum distance from the second testing-unit group to the second lateral side in the direction perpendicular to the first direction.

Abstract: The present disclosure discloses an image encryption method based on multi-scale compressed sensing and a Markov model. According to the difference in information carried by low-frequency coefficients and high-frequency coefficients of an image, different sampling rates are set for the low-frequency coefficients and the high-frequency coefficients of the image, which can effectively improve the reconstruction quality of a decrypted image. The decrypted image obtained by the present disclosure has higher quality than the decrypted image generated by the existing scheme, and a better visual effect and more complete original image information can be obtained.

Abstract: Techniques for data replication involve determining, based on a metadata log, whether an overlap exists between a target input/output operation or target IO and previous IOs, wherein the metadata log records metadata related to data replication. Such techniques further involve writing the target IO to a source data volume according to a determination that no overlap exists between the target IO and the previous IOs. Such techniques further involve replicating data within the range of the overlap from the source data volume to a data log according to a determination that the overlap exists between the target IO and the previous IOs, and writing the target IO to the source data volume after completion of the replicating. Such techniques further involve replicating the target IO to a target data volume based on the metadata log and the data log.

Abstract: Disclosed are a method of PCB sectional preshrinking, a device, an equipment and a computer-readable storage medium. The method includes: obtaining a PCB raw data and a preset accuracy requirement; determining a preshrinking compensation value according to the PCB raw data and the preset accuracy requirement; determining a first sectional length according to the PCB raw data and the preshrinking compensation value; determining a preshrinking compensation ratio according to the preshrinking compensation value and the first sectional length; determining a second sectional length according to the PCB raw data, the first sectional length and the preshrinking compensation ratio; and determining an optimization preshrinking design length according to the first sectional length and the second sectional length.

Abstract: This disclosure relates to an organic electroluminescent structure and a fabrication method thereof, and a display device. The organic electroluminescent structure includes a base substrate; an anode layer formed on the base substrate, in which the anode layer comprises a plurality of anodes arranged at intervals; an organic light-emitting functional layer having a hole injection layer, in which the hole injection layer includes a plurality of hole injection blocks arranged at intervals, and each of the hole injection blocks is correspondingly formed on the second surface of one of the anodes; and a cathode layer formed at a side of the organic light-emitting functional layer facing away from the anode layer.

Abstract: Provided is display substrate, including driving circuit board, and first electrode layer, insulating layer, second electrode layer, isolation layer, transparent conductive layer sequentially stacked thereon. Driving circuit board includes pixel and bonding regions. First electrode layer includes first sub-portion in bonding region and second sub-portion in pixel region. Insulating and isolation layers are partially cover bonding and pixel regions. Insulating layer has first via hole in area corresponding to first sub-portion. Isolation layer has second via hole in the area. Axes of first and second via holes coincide, first sub-portion is exposed at first and second via holes. Second electrode layer is in pixel region, coupled to second sub-portion through third via hole in area corresponding to second sub-portion. Isolation layer has fourth via hole in area corresponding to second electrode layer. Transparent conductive layer is in pixel region, coupled to second electrode layer through fourth via hole.

Abstract: A display panel includes an active area and a peripheral area surrounding the active area, and the display panel further includes: a substrate and a plurality of light emitting devices arranged on the substrate in array, wherein the plurality of light emitting devices are located at least in the active area; a conducting layer comprising a cathode ring and cathodes of the plurality of light emitting devices, wherein the cathode ring is located in the peripheral area, and the cathode ring surrounds the active area; and a lens layer located at a side of the light emitting devices away from the substrate, wherein the lens layer extends from the active area to the peripheral area; wherein an orthographic projection of the lens layer on the substrate is located within an area delineated by an outer contour of an orthographic projection of the cathode ring on the substrate.

Abstract: A display substrate includes: a wafer base (1) provided with a transistor; a metal reflective structure (2) on the wafer base, the metal reflective structure being electrically connected to the transistor, and being provided with a protrusion (21) protruding away from the wafer base; a first insulation layer (3) on a side of the metal reflective structure away from the wafer base, a surface of a portion of the first insulation layer corresponding to the metal reflective structure and facing away from the metal reflective structure being flush with a top face of the protrusion; and a transparent anode (4) on a side of the first insulation layer facing away from the metal reflective structure, the transparent anode being in contact connection with the top face of the protrusion.

Abstract: The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.

Abstract: The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.

Abstract: A method, computer program product, and computer system for creating, by a computing device, a first directory entry with a name using a majority protocol, wherein the creation may be done on a source side for a multi-protocol delta copy migration session. Minority protocol name information associated with the first directory entry using the majority protocol may be relayed to a destination side for the multi-protocol delta copy migration session, wherein the minority protocol name information is cached on the destination side. A second directory entry with the name using the majority protocol for the multi-protocol delta copy migration session may be created on the destination side. The name of the second directory entry created using the majority protocol may be reset to the minority protocol name created using the minority protocol name information cached on the destination side.

Abstract: In an embodiment, a display apparatus includes: a backlight module; a housing having a cavity for receiving the backlight module therein; adsorption device mounted on the housing and configured for removably adsorbing the backlight module on the housing; and a controller configured for controlling the adsorption device to switch between a turn-on state in which the adsorption device generates an adsorption force to adsorb the backlight module to the housing and a turn-off state in which the adsorption device stops the adsorption to remove backlight module from the housing.

Abstract: The present disclosure provides an array substrate including a driving circuit board, and a first electrode layer, an insulating layer, and an anode structure sequentially stacked thereon. The anode structure includes a reflective layer, an intermediate dielectric layer, and a transparent conductive layer sequentially provided in a direction away from the driving circuit board. The array substrate has first, second, and third pixel regions. The anode structure includes first, second, and third anode structures. The first electrode layer includes first, second and third sub-portions. The first, second and third anode structures are coupled with the first, second and third sub-portions through first, second and third via holes in the insulating layer, respectively. A surface of the insulating layer in contact with the first, second and third anode structures is flush; and a thickness of the intermediate dielectric layer in the second, first and third anode structures increases sequentially.

Abstract: Provided is display substrate, including driving circuit board, and first electrode layer, insulating layer, second electrode layer, isolation layer, transparent conductive layer sequentially stacked thereon. Driving circuit board includes pixel and bonding regions. First electrode layer includes first sub-portion in bonding region and second sub-portion in pixel region. Insulating and isolation layers are partially cover bonding and pixel regions. Insulating layer has first via hole in area corresponding to first sub-portion. Isolation layer has second via hole in the area. Axes of first and second via holes coincide, first sub-portion is exposed at first and second via holes. Second electrode layer is in pixel region, coupled to second sub-portion through third via hole in area corresponding to second sub-portion. Isolation layer has fourth via hole in area corresponding to second electrode layer. Transparent conductive layer is in pixel region, coupled to second electrode layer through fourth via hole.

Abstract: A pixel circuit, a driving method thereof and a display panel are disclosed. The pixel circuit includes a data writing circuit, a light-emitting drive circuit, and a voltage amplification circuit; the data writing circuit is electrically connected with a first node and is configured to write a data signal to the first node under control of a scan signal; two ends of the voltage amplification circuit are electrically connected with the first node and a second node respectively, and the voltage amplification circuit are configured to obtain an amplified voltage signal based on the data signal and write the amplified voltage signal to the second node; and the light-emitting drive circuit is electrically connected with the second node and is configured to drive a light-emitting component to emit light under control of the amplified voltage signal.

Abstract: This disclosure relates to an organic electroluminescent structure and a fabrication method thereof, and a display device. The organic electroluminescent structure includes a base substrate; an anode layer formed on the base substrate, in which the anode layer comprises a plurality of anodes arranged at intervals; an organic light-emitting functional layer having a hole injection layer, in which the hole injection layer includes a plurality of hole injection blocks arranged at intervals, and each of the hole injection blocks is correspondingly formed on the second surface of one of the anodes; and a cathode layer formed at a side of the organic light-emitting functional layer facing away from the anode layer.

Abstract: A pixel circuit and a driving method thereof, a display panel, and a display device. The pixel circuit includes a driving circuit, a first switching circuit, a second switching circuit, and a first reset circuit. The driving circuit is configured to drive a light-emitting element to emit light, the first switching circuit is configured to be turned on in response to a first scanning signal to transmit a data signal to a control terminal of the driving circuit, the second switching circuit is configured to be turned on in response to a light-emitting control signal to transmit a first power signal to a first terminal of the driving circuit, and the first reset circuit is configured to be turned on in response to a first reset control signal to transmit a reset signal to the first terminal of the driving circuit.

Abstract: A pixel circuit, includes: a driving signal generating sub-circuit configured to generate and output an initial driving signal; a voltage boost sub-circuit electrically connected to the driving signal generating sub-circuit, and configured to receive the initial driving signal, amplify the initial driving signal to generate a target driving signal, and output the target driving signal; and a light-emitting sub-circuit electrically connected to the voltage boost sub-circuit, and configured to receive the target driving signal and be driven by the target driving signal to emit light.

Abstract: A display panel and a method for manufacturing a display panel are disclosed. The display panel includes a first sub-pixel region and a second sub-pixel region which are adjacent to each other. The display panel includes a substrate and a first conductive layer, an organic functional layer, and a second conductive layer which are sequentially on the substrate. The organic functional layer includes a charge generation layer, and the charge generation layer includes a first charge generation layer portion and a second charge generation layer portion which are in the first sub-pixel region and the second sub-pixel region, respectively. The display panel further includes a spacer between the first sub-pixel region and the second sub-pixel region, and the spacer disconnects the first charge generation layer portion and the second charge generation layer portion.

Abstract: A pixel circuit, a driving method thereof and a display panel are disclosed. The pixel circuit includes a data writing circuit, a light-emitting drive circuit, and a voltage amplification circuit; the data writing circuit is electrically connected with a first node and is configured to write a data signal to the first node under control of a scan signal; two ends of the voltage amplification circuit are electrically connected with the first node and a second node respectively, and the voltage amplification circuit are configured to obtain an amplified voltage signal based on the data signal and write the amplified voltage signal to the second node; and the light-emitting drive circuit is electrically connected with the second node and is configured to drive a light-emitting component to emit light under control of the amplified voltage signal.