Abstract: Heat transfer apparatus may include an integrated circuit (“IC”) package that itself includes a package substrate and one or more dies coupled to the package substrate such that bottom surfaces of the dies face toward the package substrate and top surfaces of the dies define die top areas. A metal member, such as a package lid, a heat sink, or a cold plate, may be designed to fit above at least part of the package substrate. A heat transfer member having a higher thermal conductivity than the metal member is attached to the metal member such that the heat transfer member is disposed over a die top area when the metal member is placed over the package substrate. In some embodiments, the heat transfer member may comprise a diamond material.

Abstract: An integrated circuit package including a package substrate including a monolithic core, the monolithic core having a first substrate side, a second substrate side opposite the first substrate side, a thickness in a range from 800 to 2000 microns and a through-cavity that passes through the first and second substrate sides. The package includes a device module, the device module having a first module side and a second module side opposite the first module side. The device module is embedded in the through-cavity, the first module side is aligned with the first substrate side, the second module side is aligned with the second substrate side, and the device module includes one or more silicon-based passive or silicon-based active device component. A method of manufacture of the integrated circuit package is also disclosed.

Abstract: An IC package including an IC and a TIM assembly located on the IC. The TIM assembly includes a lid defining a compartment, a mixed-phase material located in the compartment, the mixed-phase material including nanostructures, and a liquid metal occupying open spaces in the compartment that are not occupied by the nanostructures. A method of manufacturing an IC package, including providing the IC and placing the TIM assembly on the IC. A computer having one or more circuits that include the IC package.

Abstract: A chip package and method for fabricating the same are provided which utilize a cover having one or more windows formed through one or more sidewalls to provide excellent resistance to warpage while allowing access to an internal volume of the chip package. In one example, the chip package includes a package substrate, an integrated circuit (IC) die, and a cover disposed over the IC die. The cover includes a lower surface facing the IC die, an upper surface facing away from the IC die, a lip extending from the lower surface, and a first sidewall extending from a first edge of the upper surface to the bottom of the lip. The lip is secured to the package substrate and encloses a volume between the lower surface and the package substrate. The IC die resides in the volume. A first elongated window is formed through the first sidewall and exposes the volume through the cover.

Abstract: A chip package assembly and method for fabricating the same are provided which utilize a composite stiffener selected to provide excellent resistance to warpage without detrimentally imposing excessive stress on a package substrate of the package assembly. In one example, the chip package assembly includes an integrated circuit die stacked on a top surface of a package substrate, and a composite stiffener coupled to a first edge of the package substrate. The composite stiffener includes a first stiffener member and a second stiffener member. The first stiffener member has a bottom surface bonded to the top surface of the package substrate. The second stiffener member is disposed over the first stiffener member. The second stiffener member has a bottom surface bonded to the top surface of the package substrate. The second stiffener member has a Young's modulus that is less than a Young's modulus of the first stiffener member.

Abstract: A chip package assembly, a package substrate and methods for fabricating the same are disclosed herein. In one example, a chip package assembly includes a package substrate, an IC die and a stiffener. The package substrate includes a first dam projecting from a top surface of the package substrate. The IC die and the stiffener are mounted to the top surface of the package substrate. The stiffener includes a bottom surface that is disposed adjacent to the first dam. At least one surface mounted component is mounted to a region of the package substrate defined between the stiffener and the IC die. An adhesive coupling the stiffener to the package substrate is in contact with the first dam.

Abstract: Integrated circuit packaging devices and methods are disclosed. An embodiment package lid is formed from a single piece of material. The lid includes a planar rectangular main body having a bottom surface, and a leg disposed at each corner of the main body and within a perimeter of the main body. Each leg has a wall projecting downwardly from the main body and a non-planar bottom surface disposed at a bottom of the wall. The non-planar bottom surface of the leg faces a same direction as the main body bottom surface.