Abstract: Systems and methods for generating a voltage reference are provided. One embodiment, among others, provides a reference-voltage generating circuit that incorporates a biasing diode together with a first field effect transistor (FET) connected in series with the biasing diode. A first reference-voltage is generated at a connection point between the biasing diode and the first FET, the first FET being selectively biased to produce a source-drain current that is substantially the same as a current passing through the biasing diode. The current passing through the biasing diode configures the biasing diode to operate as a linear resistor having a voltage drop that varies at a desired rate when the diode is subjected to a change in temperature.

Abstract: Systems for altering the timing of edges of an input signal for altering the position in time of timing edges of an input signal are disclosed. Such a system includes a differential amplifier having positive and negative inputs and outputs. The differential amplifier includes a symmetrical differential field effect transistor (FET) pair, each FET transistor of the pair having drain, source, and gate electrodes, wherein the source electrodes of the FET transistors are connected together. The differential amplifier also includes active loads coupled to the drain electrodes of the FET transistors and configured to be controllably biased to offset effects to the delay element caused by a plurality of operating variations. The delay element also includes variable capacitance banks connected to the outputs of the differential amplifier and configured to supply a selected capacitance to the outputs so as to delay and thereby alter the timing edges of the input signal. Methods and other systems also are provided.