Patents by Inventor Ronny Cohen

Ronny Cohen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Monitorable Locking Assemblies
    Publication number: 20080036596
    Abstract: A key-operated remotely monitorable locking assembly including a key-operated lock including a lock body including a key operated locking assembly and a tamper monitorable lockable assembly which is selectably locked to the lock body by operation of the mechanical key operated locking assembly and a wireless communication circuit located in a least one of the lock body and the lockable assembly for providing a remotely monitorable indication of tampering with the lockable assembly.
    Type: Application
    Filed: March 30, 2005
    Publication date: February 14, 2008
    Inventors: Micha Auerbach, Joseph Shekel, Alon Zelzion, Eli Golan, Noach Eizen, Ronny Cohen, Eli Levy
  • Parallel operating CPU core and DSP module for executing sequence of vector DSP code instructions to generate decoded constellation points in QAM/TCM modem application
    Patent number: 5625828
    Abstract: An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the shared internal bus and connectable via a shared external bus to a shared external memory array such that instructions and data held in the shared external memory array are transferrable to the shared internal bus via the shared bus interface unit. A general purpose (GP) central processing unit (CPU) is connected to the shared internal bus for retrieving GP instructions. The GP CPU includes an execution unit for executing GP instructions to process data retrieved by the GP CPU from the shared internal bus. A digital signal processor (DSP) module connected to the shared internal bus, the DSP module includes a signal processor for processing an externally-provided digital signal received by the DSP module by executing DSP command-list instructions.
    Type: Grant
    Filed: July 1, 1994
    Date of Patent: April 29, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Iddo Carmon, Itael Fraenkel, Omri Viner, Ronny Cohen
  • Integrated data processing system including CPU core and parallel, independently operating DSP module
    Patent number: 5592677
    Abstract: An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the shared internal bus and connectable via a shared external bus to a shared external memory array such that instructions and data held in the shared external memory array are transferrable to the shared internal bus via the shared bus interface unit. A general purpose (GP) central processing unit (CPU) is connected to the shared internal bus for retrieving GP instructions. The GP CPU includes an execution unit for executing GP instructions to process data retrieved by the GP CPU from the shared internal bus. A digital signal processor (DSP) module connected to the shared internal bus, the DSP module includes a signal processor for processing an externally-provided digital signal received by the DSP module by executing DSP command-list instructions.
    Type: Grant
    Filed: May 19, 1994
    Date of Patent: January 7, 1997
    Assignee: National Semiconductor Corporation
    Inventors: Amos Intrater, Andy Birenbaum, Gideon Intrater, Iddo Carmon, Ilan Shimony, Itael Fraenkel, Lev Epstein, Lior Katzri, Omri Viner, Raya Levitan, Ronny Cohen, Sidi Yomtov, Yehezkel Tzadik, Zvi Greenfeld, Israel Greiss, Oved Oz, Yachin Afek, Meir Tsadik, Moshe Doron, Alberto Sandbank
  • Integrated CPU core and parallel, independently operating DSP module and time-critical core priority scheme
    Patent number: 5590357
    Abstract: An integrated data processing system includes a shared internal bus for transferring both instructions and data. A shared bus interface unit is connected to the shared internal bus and connectable via a shared external bus to a shared external memory array such that instructions and data held in the shared external memory array are transferrable to the shared internal bus via the shared bus interface unit. A general purpose (GP) central processing unit (CPU) is connected to the shared internal bus for retrieving GP instructions. The OP CPU includes an execution unit for executing GP instructions to process data retrieved by the GP CPU from the shared internal bus. A digital signal processor (DSP) module connected to the shared internal bus, the DSP module includes a signal processor for processing an externally-provided digital signal received by the DSP module by executing DSP command-list instructions.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: December 31, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Amos Intrater, Andy Birenbaum, Gideon Intrater, Iddo Carmon, Ilan Shimony, Itael Fraenkel, Lev Epstein, Lior Katzri, Omri Viner, Raya Levitan, Ronny Cohen, Sidi Yomtov, Yehezkel Tzadik, Zvi Greenfeld, Israel Greiss, Oved Oz, Yachin Afek, Meir Tsadik, Moshe Doron, Alberto Sandbank
  • DTMF detection in an integrated data processing system
    Patent number: 5487173
    Abstract: The present invention is directed to an integrated data processing system that includes a general purpose (GP) CPU core for processing data in accordance with a GP instruction set and a digital signal processor (DSP) module for processing data in accordance with command-list code. The DSP module is operable to execute the command-list code independent of and in parallel with execution of the GP instruction set by the CPU core. The system also includes a mechanism for DTMF detection.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: January 23, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Israel Greiss, Ronny Cohen, Omri Viner