Patents by Inventor RONY GHATTAS

RONY GHATTAS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9870301
    Abstract: A processing device comprises a debug port controller to monitor operations of the processing device to determine whether the processing device is operating in a first mode or a second mode and to collect trace information comprising operating characteristics of the processing device. The processing device further comprises a display engine logic to process display data for output to a display device. In addition, the processing device comprises a display engine interface to provide, to a plurality of existing platform connectors, the display data from the display engine logic when the processing device is operating in the first primary mode and the trace information from the debug port controller when the processing device is operating in the second mode as determined by the debug port controller.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: January 16, 2018
    Assignee: Intel Corporation
    Inventors: Tsvika Kurts, Eilon Hazan, Sean T. Baartmans, Marcus R. Winston, Rony Ghattas, Arie Bernstein, Todd M. Witter, Marcelo Yuffe
  • Publication number: 20150278058
    Abstract: A processing device comprises a debug port controller to monitor operations of the processing device to determine whether the processing device is operating in a first mode or a second mode and to collect trace information comprising operating characteristics of the processing device. The processing device further comprises a display engine logic to process display data for output to a display device. In addition, the processing device comprises a display engine interface to provide, to a plurality of existing platform connectors, the display data from the display engine logic when the processing device is operating in the first primary mode and the trace information from the debug port controller when the processing device is operating in the second mode as determined by the debug port controller.
    Type: Application
    Filed: March 31, 2014
    Publication date: October 1, 2015
    Inventors: TSVIKA KURTS, EILON HAZAN, SEAN T. BAARTMANS, MARCUS R. WINSTON, RONY GHATTAS, ARIE BERNSTEIN, TODD M. WITTER, MARCELO YUFFE
  • Patent number: 8868992
    Abstract: REUT (Robust Electrical Unified Testing) for memory links is introduced which speeds testing, tool development, and debug. In addition it provides training hooks that have enough performance to be used by BIOS to train parameters and conditions that have not been possible with past implementations. Address pattern generation circuitry is also disclosed.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: October 21, 2014
    Assignee: Intel Corporation
    Inventors: Bryan L. Spry, Theodore Z. Schoenborn, Philip Abraham, Christopher P. Mozak, David G. Ellis, Jay J. Nejedlo, Bruce Querbach, Zvika Greenfield, Rony Ghattas, Jayasekhar Tholiyil, Charles D. Lucas, Christopher E. Yunker
  • Publication number: 20110161752
    Abstract: REUT (Robust Electrical Unified Testing) for memory links is introduced which speeds testing, tool development, and debug. In addition it provides training hooks that have enough performance to be used by BIOS to train parameters and conditions that have not been possible with past implementations. Address pattern generation circuitry is also disclosed.
    Type: Application
    Filed: December 31, 2009
    Publication date: June 30, 2011
    Inventors: BRYAN L. SPRY, THEODORE Z. SCHOENBORN, PHILIP ABRAHAM, CHRISTOPHER P. MOZAK, DAVID G. ELLIS, JAY J. NEJEDLO, BRUCE QUERBACH, ZVIKA GREENFIELD, RONY GHATTAS, JAYASEKHAR THOLIYIL, CHARLES D. LUCAS, CHRISTOPHER E. YUNKER