Abstract: A semiconductor surface processing method in one example comprises disposing a polishing pad in rotating engagement with a semiconductor wafer to be polished, dripping a first polishing solution onto the polishing pad at a first drip rate, and, concurrently, dripping a second polishing solution onto the polishing pad at a second drip rate.

Abstract: A relatively simple and inexpensive process for plating precious alloyed metals, such as AuSn, AuSnIn, AgSn, AuIn and AgIn. Anodes are formed from each of the metal components in the alloy and disposed in a conducting solution. The mass of each metal components is determined by Faraday's law. The target is also disposed in the conducting solution. Plating current is independently applied to each anode. The plating is conducted under an ultraviolet light sources to optimize the process. The plating alloys can be used for various purposes including attaching a semiconductor die to a substrate. Since the process does not involve exposure of the semiconductor die to a relatively high temperature for a relatively long time, the process does not pose a risk of contamination of the semiconductor by the adhesive or wax used to hold the die in place on the carrier during processing.

Abstract: A relatively simple and inexpensive process for plating precious alloyed metals, such as AuSn, AuSnIn, AgSn, AuIn and AgIn. Anodes are formed from each of the metal components in the alloy and disposed in a conducting solution. The mass of each metal components is determined by Faraday's law. The target is also disposed in the conducting solution. Plating current is independently applied to each anode. The plating is conducted under an ultraviolet light sources to optimize the process. The plating alloys can be used for various purposes including attaching a semiconductor die to a substrate. Since the process does not involve exposure of the semiconductor die to a relatively high temperature for a relatively long time, the process does not pose a risk of contamination of the semiconductor by the adhesive or wax used to hold the die in place on the carrier during processing.

Abstract: An electrical component housing assembly having a main housing body (2) containing a matrix (12) of receptacle cavities (34) being adapted to accommodate mating single receptacles (4) or mating double receptacles (6). The electrical receptacles include polarizing tabs (170, 270) which are received in polarizing slots (40) of the receptacle cavities (34) upon the condition that the receptacles are properly oriented with respect to the receptacle cavities. Locking tabs (172, 272) located on the receptacle (4, 6) respectively engage with the recessed channels (42) and walls (43) to secure the receptacles within the cavities (34). A locking bar (8) interacts with a locking member (37) that engages cutout portion (168, 268) of a receptacle (4, 6) to further secure the receptacles within the cavities.