Patents by Inventor Rosanna YEE

Rosanna YEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Using read values from previous decoding operations to calculate soft bit information in an error recovery operation
    Patent number: 9298552
    Abstract: Provided are an apparatus, system, and method for performing an error recovery operation with respect to a read of a block of memory cells in a storage device. A current iteration of a decoding operation is performed by applying at least one reference voltage for the current iteration to a block of the memory cells in the storage device to determine current read values in response to applying the reference voltage. A symbol is generated for each of the read memory cells by combining the determined current read value with at least one value saved during the previous iteration. The symbols are used to determine bit reliability metrics for the block of memory cells. The bit reliability metrics are decoded. In response to the decoding failing, an additional iteration of the decoding operation is performed.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: March 29, 2016
    Assignee: INTEL CORPORATION
    Inventors: Lark-Hoon Leem, Xin Guo, Ravi H. Motwani, Rosanna Yee, Scott E. Nelson
  • USING READ VALUES FROM PREVIOUS DECODING OPERATIONS TO CALCULATE SOFT BIT INFORMATION IN AN ERROR RECOVERY OPERATION
    Publication number: 20150095736
    Abstract: Provided are an apparatus, system, and method for performing an error recovery operation with respect to a read of a block of memory cells in a storage device. A current iteration of a decoding operation is performed by applying at least one reference voltage for the current iteration to a block of the memory cells in the storage device to determine current read values in response to applying the reference voltage. A symbol is generated for each of the read memory cells by combining the determined current read value with at least one value saved during the previous iteration. The symbols are used to determine bit reliability metrics for the block of memory cells. The bit reliability metrics are decoded. In response to the decoding failing, an additional iteration of the decoding operation is performed.
    Type: Application
    Filed: September 27, 2013
    Publication date: April 2, 2015
    Applicant: Intel Corporation
    Inventors: Lark-Hoon LEEM, Xin GUO, Ravi H. MOTWANI, Rosanna YEE, Scott E. NELSON