Patents by Inventor Rosario Corrado Spinella

Rosario Corrado Spinella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7781764
    Abstract: A nanometric device is disclosed for the measurement of the electrical conductivity of individual molecules and their quantum effects having: a substrate surmounted by, in order, a barrier to diffusion layer, an electrically conductive layer, a “bounder” layer and an electrically insulating layer; and a suitable miniaturized probe; wherein the “bounder” layer and the electrically insulating layer have at least one nanometric pore formed within, the base of which consists of the electrically conductive layer. A method for the production of a nanometric device for the measurement of the electrical conductivity of individual molecules and their quantum effects, and a method for the measurement of the electrical conductivity and quantum effects of a molecule of interest, are also disclosed.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: August 24, 2010
    Assignee: Consiglio Nazionale delle Ricerche
    Inventors: Sebania Libertino, Rosaria Anna Puglisi, Manuela Fichera, Salvatore Antonino Lombardo, Rosario Corrado Spinella
  • Patent number: 7777285
    Abstract: A method is provided for fabricating a semiconductor device that includes a suspended micro-system. According to the method, a silicon porous layer is formed above a silicon substrate, and the silicon porous layer is oxidized. An oxide layer is deposited, and a first polysilicon layer is deposited above the oxide layer. The first polysilicon layer, the oxide layer, and the silicon porous layer are selectively removed. A nitride layer is deposited, and a second polysilicon layer is deposited. The second polysilicon layer, the nitride layer, the first polysilicon layer, and the oxide layer are selectively removed. The silicon porous layer is removed in areas made accessible by the previous step. Also provided is a semiconductor device that includes a suspended structure fixed to at least two walls through a plurality of hinges, with the suspended structure including an oxide layer, a first polysilicon layer, a nitride layer, and a second polysilicon layer.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: August 17, 2010
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe D'Arrigo, Rosario Corrado Spinella
  • Patent number: 7195946
    Abstract: A method is provided for fabricating a semiconductor device that includes a suspended micro-system. According to the method, a silicon porous layer is formed above a silicon substrate, and the silicon porous layer is oxidized. An oxide layer is deposited, and a first polysilicon layer is deposited above the oxide layer. The first polysilicon layer, the oxide layer, and the silicon porous layer are selectively removed. A nitride layer is deposited, and a second polysilicon layer is deposited. The second polysilicon layer, the nitride layer, the first polysilicon layer, and the oxide layer are selectively removed. The silicon porous layer is removed in areas made accessible by the previous step. Also provided is a semiconductor device that includes a suspended structure fixed to at least two walls through a plurality of hinges, with the suspended structure including an oxide layer, a first polysilicon layer, a nitride layer, and a second polysilicon layer.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: March 27, 2007
    Assignee: STMicroelectronics, S.r.L.
    Inventors: Giuseppe D'Arrigo, Rosario Corrado Spinella
  • Patent number: 6969664
    Abstract: A fuel cell for an electrical load circuit includes a first monocrystalline silicon substrate and a positive half-cell formed therein, and a second monocrystalline silicon substrate and a positive half-cell formed therein. Each half-cell includes a microporous catalytic electrode permeable to a gas and connectable to the electrical load circuit. A cell area is defined on a surface of each respective monocrystalline silicon substrate, and includes a plurality of parallel trenches formed therein for receiving the gas to be fed to the respective microporous catalytic electrode. A cation exchange membrane separates the two microporous catalytic electrodes. Each half-cell includes a passageway for feeding the respective gas to the corresponding microporous catalytic electrode.
    Type: Grant
    Filed: May 16, 2002
    Date of Patent: November 29, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giuseppe D'Arrigo, Salvatore Coffa, Rosario Corrado Spinella
  • Publication number: 20030003347
    Abstract: A fuel cell for an electrical load circuit includes a first monocrystalline silicon substrate and a positive half-cell formed therein, and a second monocrystalline silicon substrate and a positive half-cell formed therein. Each half-cell includes a microporous catalytic electrode permeable to a gas and connectable to the electrical load circuit. A cell area is defined on a surface of each respective monocrystalline silicon substrate, and includes a plurality of parallel trenches formed therein for receiving the gas to be fed to the respective microporous catalytic electrode. A cation exchange membrane separates the two microporous catalytic electrodes. Each half-cell includes a passageway for feeding the respective gas to the corresponding microporous catalytic electrode.
    Type: Application
    Filed: May 16, 2002
    Publication date: January 2, 2003
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giuseppe D'Arrigo, Salvatore Coffa, Rosario Corrado Spinella