Abstract: A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain embodiments two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. In some embodiments, a plurality of guard rings enclosing respective arrays of matched devices are arranged over the surface of a semiconductor wafer, spaced apart so as to be not local to one another. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, both local and global matching are achieved.

Abstract: A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain aspects, two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices. A plurality of guard rings may be used that enclose respective arrays of matched devices arranged over the surface of a semiconductor wafer. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, local and global matching are achieved.

Abstract: A lithographic process is disclosed. In the process, devices are fabricated by a sequence of steps in which materials are deposited on a substrate and patterned. These patterned layers are used to form devices, such as semiconductor devices, optical devices and the like over the substrate. The desired pattern is formed by introducing an image of a first pattern in a layer of energy sensitive material. The image is then developed to form a pattern with features having a first size. Subsequently, the pattern is exposed to an isotropic liquid etchant to reduce the size of the features to a second, smaller size. The pattern having the features of the second, smaller size is then transferred into the underlying substrate or a layer of material formed over the substrate.