Abstract: A microcontroller with an integrated special instruction processing unit and a programmable cycle state machine. The special instruction processing unit allows offloading of intensive processing of output data and the programmable cycle state machine minimizes the amount of customized, off chip circuitry necessary to connect the microcontroller to an external display.

Abstract: A cyclic redundancy check (CRC) unit has a programmable CRC engine, a variable buffer memory operable to store k words wherein each word comprises n-bits, wherein k and n can be varied, and shift logic operable to shift data from said FIFO memory into said programmable CRC engine.

Abstract: A programmable cycle state machine interface to a microcontroller comprising a programmable cycle state machine, a first and second data bus, a first and second control output, and a control input for programming the cycle of the state machine. The programmable nature of the state machine allows for design and implementation changes without the need to redesign customized state machine logic on the microcontroller.

Abstract: A microcontroller with an integrated special instruction processing unit and a programmable cycle state machine. The special instruction processing unit allows offloading of intensive processing of output data and the programmable cycle state machine minimizes the amount of customized, off chip circuitry necessary to connect the microcontroller to an external display.

Abstract: A programmable cycle state machine interface to a microcontroller comprising a programmable cycle state machine, a first and second data bus, a first and second control output, and a control input for programming the cycle of the state machine. The programmable nature of the state machine allows for design and implementation changes without the need to redesign customized state machine logic on the microcontroller.

Abstract: A programmable cycle state machine interface to a microcontroller comprising a programmable cycle state machine, a first and second data bus, a first and second control output, and a control input for programming the cycle of the state machine. The programmable nature of the state machine allows for design and implementation changes without the need to redesign customized state machine logic on the microcontroller.

Abstract: A method of filtering one or more input signals, includes receiving one or more input signals, each having an input signal value. The method includes storing at least two instructions in a program memory to filter one or more of the input signals. Each instruction includes an opcode and identifies at least two input locations and at least one output location. The method includes, for one or more of the one or more input signals, and then for each instruction, fetching input values from the at least two input locations. The method further includes performing an operation on the input values to produce an output value, based on the opcode of the instruction and outputting the output value to at least one output location.

Abstract: A method and apparatus for configuring a cyclic redundancy check (CRC) generation circuit to perform CRC on a data stream are disclosed. The method includes storing a generator polynomial associated with a CRC equation in a register, where the generator polynomial has a length capable of varying such that the length has any value less than or equal to a number of bits associated with a CRC generation circuit. A bit position of the CRC generation circuit that corresponds to the length of the generator polynomial is selected by using a first multiplexer to generate a feedback value. The CRC generation circuit is programmed to calculate a CRC checksum based on the generator polynomial stored in the register and the feedback value from the selected bit position.