Patents by Inventor Roshan Thonse SHETTY

Roshan Thonse SHETTY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • IO power bus mesh structure design
    Patent number: 9929095
    Abstract: A MOS device includes an IO pad ring. The MOS device includes a first IO pad located on a first side of the IO pad ring, and a second IO pad located on a second side of the IO pad ring. The first IO pad includes a metal x layer power interconnect extending in a first direction. The first metal x layer power interconnect is of a metal x layer. The second side is 90° from the first side. The second IO pad includes a second metal x layer power interconnect extending in the first direction. The second metal x layer power interconnect is of the metal x layer. The second IO pad may further include at least one of a metal x+1 layer power interconnect or a metal x?1 layer power interconnect that extends orthogonal to the second metal x layer power interconnect of the second IO pad.
    Type: Grant
    Filed: November 6, 2014
    Date of Patent: March 27, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Rohit Vinod Singewar, Roshan Thonse Shetty
  • IO POWER BUS MESH STRUCTURE DESIGN
    Publication number: 20160133567
    Abstract: A MOS device includes an IO pad ring. The MOS device includes a first IO pad located on a first side of the IO pad ring, and a second IO pad located on a second side of the IO pad ring. The first IO pad includes a metal x layer power interconnect extending in a first direction. The first metal x layer power interconnect is of a metal x layer. The second side is 90° from the first side. The second IO pad includes a second metal x layer power interconnect extending in the first direction. The second metal x layer power interconnect is of the metal x layer. The second IO pad may further include at least one of a metal x+1 layer power interconnect or a metal x?1 layer power interconnect that extends orthogonal to the second metal x layer power interconnect of the second IO pad.
    Type: Application
    Filed: November 6, 2014
    Publication date: May 12, 2016
    Inventors: Rohit Vinod SINGEWAR, Roshan Thonse SHETTY