Patents by Inventor Roslan Bin Said
Roslan Bin Said has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11239128Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: August 16, 2019Date of Patent: February 1, 2022Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Publication number: 20190371693Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: August 16, 2019Publication date: December 5, 2019Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 10431513Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: May 1, 2017Date of Patent: October 1, 2019Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Publication number: 20170301598Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: May 1, 2017Publication date: October 19, 2017Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 9640458Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: August 27, 2014Date of Patent: May 2, 2017Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Publication number: 20150137364Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: August 27, 2014Publication date: May 21, 2015Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 8823159Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: July 2, 2013Date of Patent: September 2, 2014Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Publication number: 20130292853Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: July 2, 2013Publication date: November 7, 2013Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 8507318Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: May 20, 2009Date of Patent: August 13, 2013Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 8269328Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: GrantFiled: November 19, 2010Date of Patent: September 18, 2012Assignee: Micron Technology, Inc.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said
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Publication number: 20110062583Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: ApplicationFiled: November 19, 2010Publication date: March 17, 2011Applicant: MICRON TECHNOLOGY, INC.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said
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Patent number: 7846768Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: GrantFiled: July 22, 2008Date of Patent: December 7, 2010Assignee: Micron Technology, Inc.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said
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Publication number: 20090239337Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: ApplicationFiled: May 20, 2009Publication date: September 24, 2009Applicant: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Patent number: 7557443Abstract: Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices are described herein. In one embodiment, a set of stacked microelectronic devices includes (a) a first microelectronic die having a first side and a second side opposite the first side, (b) a first substrate attached to the first side of the first microelectronic die and electrically coupled to the first microelectronic die, (c) a second substrate attached to the second side of the first microelectronic die, (d) a plurality of electrical couplers attached to the second substrate, (e) a third substrate coupled to the electrical couplers, and (f) a second microelectronic die attached to the third substrate. The electrical couplers are positioned such that at least some of the electrical couplers are inboard the first microelectronic die.Type: GrantFiled: August 31, 2005Date of Patent: July 7, 2009Assignee: Micron Technology, Inc.Inventors: Seng Kim Dalson Ye, Chin Hui Chong, Choon Kuan Lee, Wang Lai Lee, Roslan Bin Said
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Publication number: 20080280396Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: ApplicationFiled: July 22, 2008Publication date: November 13, 2008Applicant: Micron Technology, Inc.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said
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Patent number: 7425463Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: GrantFiled: June 9, 2006Date of Patent: September 16, 2008Assignee: Micron Technology, Inc.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said
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Patent number: 7205656Abstract: An assembly method is disclosed that includes providing a substrate, securing a first semiconductor device on a first surface thereof, and superimposing at least a second semiconductor device at least partially over the first semiconductor device is disclosed. An outer peripheral portion of the second semiconductor device overhangs both the first semiconductor device and the substrate. Discrete conductive elements are placed between the outer peripheral portion of the second semiconductor device and a second surface of the substrate. Intermediate portions of the discrete conductive elements pass outside of a side surface of the substrate. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.Type: GrantFiled: February 22, 2005Date of Patent: April 17, 2007Assignee: Micron Technology, Inc.Inventors: Dalson Ye Seng Kim, Chong Chin Hui, Lee Wang Lai, Roslan Bin Said