Patents by Inventor Ross Cunniff

Ross Cunniff has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9832388
    Abstract: Systems and methods for generating high dynamic images from interleaved Bayer array data with high spatial resolution and reduced sampling artifacts. Bayer array data are demosaiced into components of the YUV color space before deinterleaving. The Y component and the UV components can be derived from the Bayer array data through demosiac convolution processes. A respective convolution is performed between a convolution kernel and a set of adjacent pixels of the Bayer array that are in the same color channel. A convolution kernel is selected based the mosaic pattern of the Bayer array and the color channels of the set of adjacent pixels. The Y data and UV data are deinterleaved and interpolated into frames of short exposure and long exposures in the second color space. The short exposure and long exposure frames are then blended and converted back to a RGB frame representing a high dynamic range image.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: November 28, 2017
    Assignee: Nvidia Corporation
    Inventors: Ricardo Motta, Brian Cabral, Sean Pieper, Ross Cunniff
  • Publication number: 20160037044
    Abstract: Systems and methods for generating high dynamic images from interleaved Bayer array data with high spatial resolution and reduced sampling artifacts. Bayer array data are demosaiced into components of the YUV color space before deinterleaving. The Y component and the UV components can be derived from the Bayer array data through demosiac convolution processes. A respective convolution is performed between a convolution kernel and a set of adjacent pixels of the Bayer array that are in the same color channel. A convolution kernel is selected based the mosaic pattern of the Bayer array and the color channels of the set of adjacent pixels. The Y data and UV data are deinterleaved and interpolated into frames of short exposure and long exposures in the second color space. The short exposure and long exposure frames are then blended and converted back to a RGB frame representing a high dynamic range image.
    Type: Application
    Filed: August 4, 2014
    Publication date: February 4, 2016
    Inventors: Ricardo MOTTA, Brian CABRAL, Sean PIEPER, Ross CUNNIFF
  • Patent number: 8866833
    Abstract: A system, method, and computer program product are provided for a dynamic display refresh. In use, a state of a display device is identified in which an entirety of an image frame is currently displayed by the display device. In response to the identification of the state, it is determined whether an entirety of a next image frame to be displayed has been rendered to memory. The next image frame is transmitted to the display device for display thereof, when it is determined that the entirety of the next image frame to be displayed has been rendered to the memory. Further, a refresh of the display device is delayed, when it is determined that the entirety of the next image frame to be displayed has not been rendered to the memory.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: October 21, 2014
    Assignee: NVIDIA Corporation
    Inventors: Tom Petersen, David Wyatt, Paul van der Kouwe, Emmett M. Kilgariff, Laurence Harrison, Jensen Huang, Tony Tamasi, Gerrit A. Slavenburg, Thomas F. Fox, David Matthew Stears, Robert Jan Schutten, Ross Cunniff, Ajay Kamalvanshi, Robert Osborne, Rouslan Dimitrov
  • Publication number: 20140092113
    Abstract: A system, method, and computer program product are provided for a dynamic display refresh. In use, a state of a display device is identified in which an entirety of an image frame is currently displayed by the display device. In response to the identification of the state, it is determined whether an entirety of a next image frame to be displayed has been rendered to memory. The next image frame is transmitted to the display device for display thereof, when it is determined that the entirety of the next image frame to be displayed has been rendered to the memory. Further, a refresh of the display device is delayed, when it is determined that the entirety of the next image frame to be displayed has not been rendered to the memory.
    Type: Application
    Filed: September 11, 2013
    Publication date: April 3, 2014
    Applicant: NVIDIA Corporation
    Inventors: Tom Petersen, David Wyatt, Paul van der Kouwe, Emmett M. Kilgariff, Laurence Harrison, Jensen Huang, Tony Tamasi, Gerrit A. Slavenburg, Thomas F. Fox, David Matthew Stears, Robert Jan Schutten, Ross Cunniff, Ajay Kamalvanshi, Robert Osborne, Rouslan L. Dimitrov
  • Patent number: 7623730
    Abstract: A texture mapping system comprises memory and a texture map manager. The memory stores a parametric texture map, and the parametric texture map has a plurality of texels. Each of the texels defines a variable expression that defines a luminosity parameter as a function of light direction. The texture map manager is configured to perform a rotation of a texture defined by the parametric texture map, and the texture map manager is further configured to adjust the variable expression of at least one of the texels to compensate for the rotation.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: November 24, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Bradford A. Ritter, Ross Cunniff
  • Publication number: 20050024374
    Abstract: A texture mapping system comprises memory and a texture map manager. The memory stores a parametric texture map, and the parametric texture map has a plurality of texels. Each of the texels defines a variable expression that defines a luminosity parameter as a function of light direction. The texture map manager is configured to perform a rotation of a texture defined by the parametric texture map, and the texture map manager is further configured to adjust the variable expression of at least one of the texels to compensate for the rotation.
    Type: Application
    Filed: July 30, 2003
    Publication date: February 3, 2005
    Inventors: Bradford Ritter, Ross Cunniff
  • Patent number: 6727899
    Abstract: A graphical display system of the present invention efficiently performs occlusion culling based on frame-to-frame temporal coherency. The graphical display system utilizes a frame buffer and rendering logic. The rendering logic is configured to receive graphical objects that define an image frame. In response to receiving one of the objects, the rendering logic is configured to make a determination as to whether the one object is visible in a previous image frame that was previously rendered to the frame buffer. The rendering logic is further configured to render the one object to the frame buffer based on the determination.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: April 27, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Don B. Hoffman, Joseph Norman Gee, Ross Cunniff, Howard D Stroyan
  • Patent number: 6518968
    Abstract: The present invention provides a method and apparatus for performing H-space bump mapping. The apparatus of the present invention is a fragment processor of a computer graphics display system. The method of the present invention is performed by the fragment processor. In accordance with the method of the present invention, for each vertex of each polygon being processed, the fragment processor calculates both diffuse and specular lighting terms. Then, for each fragment within the polygon defined by the vertices, the fragment processor interpolates the specular and diffuse lighting terms to obtain diffuse and specular lighting terms for each fragment. If bump mapping has been enabled, the fragment processor adds perturbations to the diffuse and specular lighting terms to generate the bump mapping. Preferably, prior to performing the H-space bump mapping algorithm, texture coordinate gradient vectors are calculated for the image to be rendered.
    Type: Grant
    Filed: May 17, 2000
    Date of Patent: February 11, 2003
    Assignee: Hewlett-Packard Company
    Inventors: Bradford A. Ritter, Ross Cunniff
  • Patent number: 6476806
    Abstract: A method and apparatus is provided for performing occlusion testing in a computer graphics display system. The apparatus comprises logic configured to determine whether or not an object of a current image frame was occluded in a previous image frame. If a determination is made that the object was not occluded in the previous image frame, then the logic causes the object of the current image frame to be rendered to a frame buffer of the computer graphics display system. The current and previous image frames are each comprised of a plurality of objects, and the logic determines whether or not each of the objects of the current image frame were occluded in the previous image frame. The logic causes any objects of the current image frame that were not occluded in the previous image frame to be rendered to the frame buffer.
    Type: Grant
    Filed: April 16, 1999
    Date of Patent: November 5, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Ross Cunniff, Howard D. Stroyan, Norman Gee
  • Publication number: 20020135587
    Abstract: The present invention is generally directed to a system and method for performing accumulation buffer operations using texture mapping hardware. In accordance with one aspect of the invention, a method is provided that operates by allocating a texture map of equal size as a display screen and copying contents of a frame buffer to the allocated texture map. The method then identifies an accumulation buffer operation and performs the accumulation buffer operation in a fragment unit. Preferably, the fragment unit includes an arithmetic logic unit (ALU) to perform high-speed mathematical operations. Finally, the method directs results of the accumulation buffer operation to the frame buffer, and copies contents of the frame buffer to the allocated texture map.
    Type: Application
    Filed: March 18, 2002
    Publication date: September 26, 2002
    Inventor: Ross Cunniff
  • Patent number: 6396502
    Abstract: The present invention is generally directed to a system and method for performing accumulation buffer operations using texture mapping hardware. In accordance with one aspect of the invention, a method is provided that operates by allocating a texture map of equal size as a display screen and copying contents of a frame buffer to the allocated texture map. The method then identifies an accumulation buffer operation and performs the accumulation buffer operation in a fragment unit. Preferably, the fragment unit includes an arithmetic logic unit (ALU) to perform high-speed mathematical operations. Finally, the method directs results of the accumulation buffer operation to the frame buffer, and copies contents of the frame buffer to the allocated texture map.
    Type: Grant
    Filed: October 15, 1999
    Date of Patent: May 28, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Ross Cunniff
  • Publication number: 20010043216
    Abstract: A graphical display system of the present invention efficiently performs occlusion culling based on frame-to-frame temporal coherency. The graphical display system utilizes a frame buffer and rendering logic. The rendering logic is configured to receive graphical objects that define an image frame. In response to receiving one of the objects, the rendering logic is configured to make a determination as to whether the one object is visible in a previous image frame that was previously rendered to the frame buffer. The rendering logic is further configured to render the one object to the frame buffer based on the determination.
    Type: Application
    Filed: July 10, 2001
    Publication date: November 22, 2001
    Inventors: Don B. Hoffman, Joseph Norman Gee, Ross Cunniff, Howard D. Stroyan
  • Patent number: 5945992
    Abstract: In a client-server system in which scenes of objects are displayed by a client which receives data from a server, the rendering of the scene is speeded up by eliminating large amounts of data associated with objects which will not be rendered. This is accomplished by storing the object data in a tree hierarchy, and then first pruning those objects which are outside of the view of the observer in several defined steps. After the objects which will not be rendered have been pruned by the server, the data associated with objects which could not be pruned is transferred to the client over a data path, and the client goes through a number of steps to cull objects which will not be viewed. By utilizing the present invention, the display of graphics objects is significantly enhanced without need to use the former brute force methodology.
    Type: Grant
    Filed: May 29, 1996
    Date of Patent: August 31, 1999
    Assignee: Hewlett Packard Company
    Inventor: Ross Cunniff
  • Patent number: 5936632
    Abstract: The invention provides a method for the fast downloading of textures to graphics hardware for use in computer graphics. By loading the textures directly into hardware, and by making that the only copy of the texture which is downloaded, it is possible to save the time and memory space which have heretofore been required to make at least two additional copies of the texture. Instead, bookkeeping entries are made which tell the graphics API and the applications software that the texture is already available in the graphics hardware.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: August 10, 1999
    Assignee: Hewlett-Packard Co.
    Inventors: Ross Cunniff, Bradley L. Saunders
  • Patent number: 5842015
    Abstract: A hardware resource manager for real-time control of a hardware resource in a multiprocessing environment is disclosed. The hardware resource manager performs control and management functions for a limited hardware resource that can be accessed by multiple asynchronous application programs in order to achieve real-time response by the limited hardware resource. The hardware resource manager of the present invention comprises a shared memory buffer and a resource daemon. The shared memory buffer provides for semaphore locking capability so that only one application program may control the hardware resource manager at a time, and virtual memory capability for storing data and command information from the application programs. The resource daemon provides interpretation and processing capability for controlling the limited hardware resource via the data and command information received from the shared memory buffer.
    Type: Grant
    Filed: July 26, 1996
    Date of Patent: November 24, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Ross Cunniff, J. Norman Gee
  • Patent number: 5771045
    Abstract: A method for decomposing a polygon into trapezoids and further decomposing the trapezoids. During the decomposition process, the method classifies vertices having a horizontal edge by traversing the active trapezoid list, and using the trapezoids found in the list to aid in classifying the vertex. When a polygon fully contains another polygon, the method slits a diagonal between the outside polygon and the inside polygon to create a single polygon. During the slitting produces, vertices are duplicated and diagonals connecting to the original vertex are left connected to the original vertex or are connected to the duplicated vertex. The method corrects improper ordering of the inside polygon, and the method provides consistency checks during the decomposition process to detect polygons with intersecting edges.
    Type: Grant
    Filed: October 23, 1995
    Date of Patent: June 23, 1998
    Assignee: Hewlett-Packard Company
    Inventors: Karen M. Ghavam, Ross Cunniff