Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a write data circuit having a write data output and a magnet length signal output, and a preamplifier that receives the write data and a magnet length signal from the write data circuit, and sets at least one write current characteristic through the magnetic write head based at least in part on the magnet length signal. The write data circuit processes write data to be recorded on the magnetic storage medium by the magnetic write head. The magnet length signal output communicates magnet lengths in the write data.

Abstract: A storage system includes a magnetic storage medium, a magnetic write head, a channel circuit and a preamplifier. The channel circuit includes a write data input, a differentiated edge emphasis signal generator, a write data output and a differentiated edge emphasis signal output. The preamplifier includes a write data input configured to receive write data from the channel circuit write data output, an edge emphasis signal input configured to receive a differentiated edge emphasis signal from the channel circuit differentiated edge emphasis signal output, and a write current edge emphasis controller configured to generate a write current to the magnetic write head based at least in part on the write data and on the differentiated edge emphasis signal.

Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a channel circuit comprising a write data output, wherein the channel circuit is operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data from the channel circuit, wherein the preamplifier comprises a number of register pages configured to store pattern dependent write current characteristics for a variety of magnet lengths, and wherein the preamplifier is operable to retrieve the write current characteristics based on magnet lengths and to record data bits on the magnetic storage medium using the write current characteristics.

Abstract: A storage system includes a magnetic storage medium, a magnetic write head, a channel circuit and a preamplifier. The channel circuit includes a write data input, a differentiated edge emphasis signal generator, a write data output and a differentiated edge emphasis signal output. The preamplifier includes a write data input configured to receive write data from the channel circuit write data output, an edge emphasis signal input configured to receive a differentiated edge emphasis signal from the channel circuit differentiated edge emphasis signal output, and a write current edge emphasis controller configured to generate a write current to the magnetic write head based at least in part on the write data and on the differentiated edge emphasis signal.

Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a channel circuit comprising a write data output, wherein the channel circuit is operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data from the channel circuit, wherein the preamplifier comprises a number of register pages configured to store pattern dependent write current characteristics for a variety of magnet lengths, and wherein the preamplifier is operable to retrieve the write current characteristics based on magnet lengths and to record data bits on the magnetic storage medium using the write current characteristics.

Abstract: A storage system includes a magnetic write head, a magnetic storage medium, a write data circuit having a write data output and a magnet length signal output, and a preamplifier that receives the write data and a magnet length signal from the write data circuit, and sets at least one write current characteristic through the magnetic write head based at least in part on the magnet length signal. The write data circuit processes write data to be recorded on the magnetic storage medium by the magnetic write head. The magnet length signal output communicates magnet lengths in the write data.

Abstract: A circuit for combining analog signals includes first and second bitstream generators and a directional coupled connected therewith. The first bitstream generator receives a first analog signal and generates a first digital bitstream as a function thereof. The second bitstream generator receives a second analog signal and generates a second digital bitstream as a function thereof. The first and second bitstream generators are configured to maintain a ninety-degree phase difference between the first and second digital bitstreams. The directional coupler receives, at a first port, the first digital bitstream, and receives, at a second port, the second digital bitstream. The directional coupler includes a third port that is terminated, and a fourth port which generates a first output signal indicative of a combination of the first and second digital bitstreams in a manner that an image component is suppressed without a need for filtering.

Abstract: A voltage-switched class-S amplifier circuit includes an output stage configured to receive at least one control signal and operative to generate an output signal as a function of the at least one control signal. The amplifier circuit further includes a driver circuit coupled with the output stage. The driver circuit is configured to receive an input bit stream signal and is operative to generate the control signal as a function of the input bit stream signal in such a manner that a common mode component is eliminated from the control signal.

Abstract: An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, a number of leads connected to the array of magnetoresistive read heads, and number of bias circuits connected to the array of read heads by the leads. The bias circuits can be configured to independently bias each of the array of read heads with the array of read heads connected in series or in parallel.

Abstract: A method is provided, for example, to implement multiplexed communication between a controller and a preamplifier in a storage device. For example, multiplexed communication is implemented by controlling a bidirectional serial data line of a digital bus to selectively transmit digital signals in either a first direction from the controller to the preamplifier or a second direction from the preamplifier to the controller, in response to a direction control signal, and concurrently transmitting a synchronous clock signal over a clock signal line of the digital bus from the controller to the preamplifier to synchronize transfer and processing of the digital signals transmitted on the bidirectional serial data line of the digital bus. The direction control signal is transmitted from the controller to the preamplifier on one of the bidirectional serial data line and the clock signal line of the digital bus.

Abstract: An apparatus for two-dimensional magnetic recording includes an array reader with a number of magnetoresistive read sensors configured to read data from a storage medium. The magnetoresistive read sensors have a number of connection terminals, with at least one of the connection terminals being shared by more than one of the magnetoresistive read sensors. The apparatus also includes a number of low-noise amplifiers connected to the connection terminals, each configured to amplify a differential signal from a different one of the magnetoresistive read sensors. The apparatus also includes a number of impedance balancing networks connected to a subset of the connection terminals.

Abstract: An apparatus for correcting crosstalk in an array reader magnetic recording system includes an array reader comprising a number of read heads operable to read data from a magnetic storage medium, a preamplifier configured to amplify the signals from the read heads, and a crosstalk correction circuit configured to reduce crosstalk between signals from the read heads.

Abstract: A circuit for combining analog signals includes first and second bitstream generators and a directional coupled connected therewith. The first bitstream generator receives a first analog signal and generates a first digital bitstream as a function thereof. The second bitstream generator receives a second analog signal and generates a second digital bitstream as a function thereof. The first and second bitstream generators are configured to maintain a ninety-degree phase difference between the first and second digital bitstreams. The directional coupler receives, at a first port, the first digital bitstream, and receives, at a second port, the second digital bitstream. The directional coupler includes a third port that is terminated, and a fourth port which generates a first output signal indicative of a combination of the first and second digital bitstreams in a manner that an image component is suppressed without a need for filtering.

Abstract: A bitstream generator includes at least first and second bitstream generator stages connected in a cascaded arrangement. The first bitstream generator stage includes a first adder which receives an input signal and generates a first error signal indicative of a difference between the input signal and a first bitstream candidate representing a closest approximation to the input signal among multiple bitstream candidates generated by the first bitstream generator stage. The second bitstream generator stage includes a second adder which receives the first error signal and generates a second error signal indicative of a difference between the first error signal and a second bitstream candidate representing a closest approximation to the input signal among multiple bitstream candidates generated by the second bitstream generator stage. A third adder in the bitstream generator receives the first and second bitstream candidates and generates an output signal more closely approximating the input signal.

Abstract: A method is provided to enable communication between a controller and a preamplifier in a storage device. For example, the method includes implementing a serial port which is configured to transmit digital signals between the controller and the preamplifier over a single bidirectional serial data line. The serial port is controlled to selectively transmit digital signals over the bidirectional serial data line in either a first direction from the controller to the preamplifier or a second direction from the preamplifier to the controller.

Abstract: An apparatus for two-dimensional magnetic recording includes a storage medium, an array of magnetoresistive read heads disposed adjacent the storage medium and spaced to read a data track, wherein the array of magnetoresistive read heads share a common terminal, a number of leads connected to the array of magnetoresistive read heads, with one lead for each of the magnetoresistive read heads, plus a common lead connected to the common terminal, wherein each of the plurality of leads other than the at least one common lead are referenced to the at least one common lead, and a preamplifier connected to the array of magnetoresistive read heads by the plurality of leads and operable to perform pseudo-differential sensing or single-ended sensing of signals from the array of magnetoresistive read heads.

Abstract: An SSB transmitter includes a digital-to-digital converter generating first and second real signal components as a function of a complex input signal supplied to the transmitter, and a digital Hilbert transformation module coupled with the digital-to-digital converter and operative to generate first and second transformed signals as a function of the first and second real signal components. The transmitter further includes first and second bit-stream generators operative to generate first and second analog signals as a function of the first and second transformed signals, respectively. The transmitter includes first and second amplifiers. The first amplifier is operative to generate a first amplified signal as a function of the first analog signal. The second amplifier is operative to generate a second amplified signal as a function of the second analog signal. An analog hybrid coupler is connected with the first and second amplifiers and operative to perform an analog Hilbert transformation.

Abstract: A composite amplifier providing digitally selectable amplification includes a plurality of channels and a combiner. Each of the channels includes a digitally controllable selector, a Class-S power amplifier, and bandpass filter. The digitally controllable selector selectively couples a digital bitstream to the amplifier. The amplifier receives the digital bitstream and provides an amplified signal. The bandpass filter generates a filtered signal as a function of the amplified signal. The combiner couples filtered signals provided by the channels to form a composite output signal.

Abstract: A method is provided, for example, to implement multiplexed communication on an analog bus between a recording channel and a preamplifier in a storage device. A first input of read data circuitry within the recording channel is switchably connected to a first analog line of the analog bus to receive read data transmitted from the preamplifier to the recording channel over the first analog line during a read operation. In addition, a write data output of write data circuitry within the recording channel is switchably connected to the first analog line of the analog bus to transmit write data from the recording channel to the preamplifier over the first analog line during a write operation.

Abstract: An SSB transmitter includes a digital-to-digital converter generating first and second real signal components as a function of a complex input signal supplied to the transmitter, and a digital Hilbert transformation module coupled with the digital-to-digital converter and operative to generate first and second transformed signals as a function of the first and second real signal components. The transmitter further includes first and second bit-stream generators operative to generate first and second analog signals as a function of the first and second transformed signals, respectively. The transmitter includes first and second amplifiers. The first amplifier is operative to generate a first amplified signal as a function of the first analog signal. The second amplifier is operative to generate a second amplified signal as a function of the second analog signal. An analog hybrid coupler is connected with the first and second amplifiers and operative to perform an analog Hilbert transformation.