Patents by Inventor Rostyslaw Zbotaniw

Rostyslaw Zbotaniw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween
    Patent number: 6253066
    Abstract: An apparatus and method produce a plurality of output signals (917-921) with fixed phase relationships therebetween. The apparatus (900) includes a first signal generator (901), a second signal generator (903), and a signal processor (907). The first signal generator produces a first input signal (911) at a first frequency. The second signal generator produces a second input signal (915) at a second frequency, wherein the second frequency is an integer multiple of the first frequency. The signal processor receives the first and second input signals and produces a plurality of output signals (917-921) having fixed phase relationships therebetween at the first frequency, wherein the fixed phase relationships are based on the integer multiple and wherein each of the output signals has a single, determinate phase relative to the phase of the first input signal.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: June 26, 2001
    Assignee: Motorola, Inc.
    Inventors: Jeffrey B. Wilhite, Paul H. Gailus, Rostyslaw Zbotaniw
  • Apparatus and method for producing a plurality of output signals with fixed phase relationships therebetween
    Patent number: 5930689
    Abstract: An apparatus and method produce a plurality of output signals (917-921) with fixed phase relationships therebetween. The apparatus (900) includes a first signal generator (901), a second signal generator (903), and a signal processor (907). The first signal generator produces a first input signal (911) at a first frequency. The second signal generator produces a second input signal (915) at a second frequency, wherein the second frequency is an integer multiple of the first frequency. The signal processor receives the first and second input signals and produces a plurality of output signals (917-921) having fixed phase relationships therebetween at the first frequency, wherein the fixed phase relationships are based on the integer multiple and wherein each of the output signals has a single, determinate phase relative to the phase of the first input signal.
    Type: Grant
    Filed: October 24, 1997
    Date of Patent: July 27, 1999
    Assignee: Motorola, Inc.
    Inventors: Jeffrey B. Wilhite, Paul H. Gailus, Rostyslaw Zbotaniw