Abstract: Provided herein are systems and methods for a nvXNOR Cell Design with enhanced store capability for BNN applications. We propose and study two versions of the nvXNOR cell with enhanced reset capabilities. The cells introduce temporary enhanced SRAM cell pull-up capability that is only activated during the reset mechanism and does not interfere with the SRAM cell functionality. The second version improves on the first one by exploiting the XNOR cell cross-coupled pass gate structure.

Abstract: An electromagnetic (EM)-based diagnostics and monitoring system and method for the non-Invasive diagnosis and monitoring of in-vivo and ex-vivo Skin Anomalies Using Lesion-Optimized Sensor System Design and Topology is disclosed herein.

Abstract: An electromagnetic (EM)-based diagnostics and monitoring system and method for the non-Invasive diagnosis and monitoring of in-vivo and ex-vivo Skin Anomalies Using Lesion-Optimized Sensor System Design and Topology is disclosed herein.

Abstract: Provided herein are systems, methods and apparatuses an antenna array or a group of antenna elements for biomarker monitoring, nerve stimulations, and methods of use.

Abstract: Provided herein are systems, methods and apparatuses for a Biomarker sensor.

Abstract: The device measures glucose concentration in blood without any extraction of blood. The device is a non-invasive method for measuring glucose Radio Frequency and Antenna Circuits and Systems. The device is a wearable device that can non-invasively measure blood glucose levels in an instantaneous manner and continuous manner.

Abstract: Provided herein are systems, methods and apparatuses for an Antenna Design for Biomarker Monitoring.

Abstract: Provided herein are systems, methods and apparatuses for an Antenna Design for Biomarker Monitoring.

Abstract: The device measures glucose concentration in blood without any extraction of blood. The device is a non-invasive method for measuring glucose Radio Frequency and Antenna Circuits and Systems. The device is a wearable device that can non-invasively measure blood glucose levels in an instantaneous manner and continuous manner.

Abstract: A system and method for designing integrated circuits includes determining a target memory module for evaluation and improvement by evaluating performance variables of the memory module. The performance variables are statistically simulated over subset combinations of variables based on pin information for the module. Sensitivities of performance on yield to the variables in the subset combinations are determined. It is then determined whether yield of the target module is acceptable, and if the yield is not acceptable, a design which includes the target module is adjusted in accordance with the sensitivities to adjust the yield.

Abstract: Techniques for improving circuit design and production are provided. In one aspect, a method for virtual fabrication of a process-sensitive circuit is provided. The method comprises the following steps. Based on a physical layout diagram of the circuit, a virtual representation of the fabricated circuit is obtained that accounts for one or more variations that can occur during a circuit production process. A quality-based metric is used to project a production yield for the virtual representation of the fabricated circuit. The physical layout diagram and/or the production process are modified. The obtaining, using and modifying steps are repeated until a desired projected production yield is attained.

Abstract: A programmable precharge circuit includes a plurality of transistors. Each transistor has a different threshold voltage from other transistors of the plurality of transistors. Each transistor is configured to connect a supply voltage to a node, and the node is selectively coupled to bitlines in accordance with a memory operation. Control logic is configured to enable at least one of the plurality of transistors to provide a programmable precharge voltage to the node in accordance with a respective threshold voltage drop from the supply voltage of one of the plurality of transistors.

Abstract: A system and method for designing integrated circuits includes determining a target memory module for evaluation and improvement by evaluating performance variables of the memory module. The performance variables are statistically simulated over subset combinations of variables based on pin information for the module. Sensitivities of performance on yield to the variables in the subset combinations are determined. It is then determined whether yield of the target module is acceptable, and if the yield is not acceptable, a design which includes the target module is adjusted in accordance with the sensitivities to adjust the yield.

Abstract: A system and method for designing a circuit includes generating physics based equations to describe phenomena of a circuit component, representing physical device geometry by correlating the physical device geometry with features of a circuit component design, and integrating the physical based equations and correlated physical device geometry into a computer based model to represent aspects of behavior and geometry for the circuit component. The circuit component is modeled in the presence of variability by statistically analyzing a design space defined by a plurality of parameters in the physics based equations and the physical device geometry to optimize at least one of cost and yield to determine an optimal design point. The circuit component is provided using the optimal design point.

Abstract: A programmable precharge circuit includes a plurality of transistors. Each transistor has a different threshold voltage from other transistors of the plurality of transistors. Each transistor is configured to connect a supply voltage to a node, and the node is selectively coupled to bitlines in accordance with a memory operation. Control logic is configured to enable at least one of the plurality of transistors to provide a programmable precharge voltage to the node in accordance with a respective threshold voltage drop from the supply voltage of one of the plurality of transistors.

Abstract: A method and computer program for efficient cell failure rate estimation in cell arrays provides an efficient mechanism for raising the performance of memory arrays beyond present levels/yields. An initial search is performed across cell circuit parameters to determine failures with respect to a set of performance variables. For a single failure region the initial search can be a uniform sampling of the parameter space and when enough failure points have been accumulated, a mean is chosen from the mean of the detected failure points. Mixture importance sampling (MIS) is then performed to efficiently estimate the single failure region. For multiple failure regions, a particular failure region is selected by varying the memory circuit cell parameters along a random set of vectors until failures are detected, thus identifying the boundary of the failure region of interest as the closest failure region. A new mean is chosen for MIS in conformity with the location of the detected boundary.

Abstract: A circuit model and method for modeling circuit waveforms. The elements present in the basic model are capacitors and ideal current sources. The adaptability and accuracy of the model is made possible by explicitly tabulating all element values as simultaneous functions of all input and output voltages, and using a high-dimensional interpolation technique of arbitrary order. The topology chosen is the simplest one that still shows the necessary qualitative features and allows for simple generalization to multiple input/output pins. Accuracy is also provided by the implicit nature of the ordinary differential equation (ODE) used to solve for the output voltages.