Abstract: A wireless device includes a controller configured to identify a scheduled transmission including a first section having a first bandwidth and a second section having a second bandwidth, select a transmit power limit for the scheduled transmission based on a relative duration of the first section compared to the second section, and select a transmit power value based on the transmit power limit, and a transmitter configured to perform the scheduled transmission with a transmit power indicated by the transmit power value.

Abstract: An apparatus include a baseband processor configured to receive digital samples of a first wireless local area network (WLAN) signal demodulated with a first phase locked loop (PLL). The baseband processor is configured to determine whether to switch from using the first PLL to demodulate the first WLAN signal to a second PLL to demodulate the first WLAN signal. The apparatus further includes a selection circuit coupled to the first PLL and the second PLL. The selection switch is configured to switch from the first PLL to the second PLL based on the determination. The baseband processor is configured to receive additional digital samples of the first WLAN signal demodulated with the second PLL.

Abstract: A wireless device includes a controller configured to identify a scheduled transmission including a first section having a first bandwidth and a second section having a second bandwidth, select a transmit power limit for the scheduled transmission based on a relative duration of the first section compared to the second section, and select a transmit power value based on the transmit power limit, and a transmitter configured to perform the scheduled transmission with a transmit power indicated by the transmit power value.

Abstract: A receiver for detecting channel occupancy of a radio channel is provided. The receiver includes an oscillation circuit configured to generate an oscillation signal. The oscillation circuit is configured to alternate a frequency of the oscillation signal between at least two different frequency values. Further, the receiver includes a down-conversion circuit configured to generate, based on a received radio frequency signal and the oscillation signal, one of an in-phase component and a quadrature component of a baseband signal. The receiver additionally includes a processing circuit configured to calculate, based on the in-phase component or the quadrature component, a signal power of the radio frequency signal.

Abstract: An apparatus include a baseband processor configured to receive digital samples of a first wireless local area network (WLAN) signal demodulated with a first phase locked loop (PLL). The baseband processor is configured to determine whether to switch from using the first PLL to demodulate the first WLAN signal to a second PLL to demodulate the first WLAN signal. The apparatus further includes a selection circuit coupled to the first PLL and the second PLL. The selection switch is configured to switch from the first PLL to the second PLL based on the determination. The baseband processor is configured to receive additional digital samples of the first WLAN signal demodulated with the second PLL.

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a controlled oscillator signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and estimate a frequency based on the quantized phase values and the wraparound phase.

Abstract: A receiver for detecting channel occupancy of a radio channel is provided. The receiver includes an oscillation circuit configured to generate an oscillation signal. The oscillation circuit is configured to alternate a frequency of the oscillation signal between at least two different frequency values. Further, the receiver includes a down-conversion circuit configured to generate, based on a received radio frequency signal and the oscillation signal, one of an in-phase component and a quadrature component of a baseband signal. The receiver additionally includes a processing circuit configured to calculate, based on the in-phase component or the quadrature component, a signal power of the radio frequency signal.

Abstract: Methods and systems for calibrating a receiver utilizing a noise signal generated by a power amplifier associated with a transmitter are provided. A calibration method or mode includes generating a noise signal with a power amplifier associated with a transmitter of the transceiver; processing the noise signal with the receiver to generate a received signal; and calibrating the receiver based at least on the received signal.

Abstract: Some demonstrative embodiments include apparatuses, devices, systems and methods of radar detection. For example, an apparatus may include a first detector component to detect energy over a wireless communication channel; a second detector component to detect a signal over the wireless communication channel, and to determine at least a classification of the signal as a radar-type or a non-radar type; a storage component to store radar detection information corresponding to signals detected by the second detector component, the radar detection information including at least the classification of the signal and one or more characteristics of the signal; and a controller to activate the second detector component upon detection of the energy by the first detector component, the controller configured to cause a radar-detection analysis of the radar detection information corresponding to a predefined time period.

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a controlled oscillator signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and estimate a frequency based on the quantized phase values and the wraparound phase.

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a Voltage Controlled Oscillator (VCO) signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and least-squares estimate a frequency based on the quantized phase values and the wraparound phase.

Abstract: The present disclosure relates to a transmitter for transmitting a transmit signal comprising a first signal portion and a second signal portion. The transmitter comprises a power amplifier configured to amplify the transmit signal. The power amplifier is prone to undesired gain variations during the first and the second signal portion. The transmitter further comprises a transmit feedback receiver coupled to an output of the power amplifier and configured to feed back the transmit signal to generate a fed back first signal portion and a fed back second signal portion. Processing circuitry is configured to determine a first gain relation between the fed back first signal portion and the first signal portion and to determine at least one second gain relation between the fed back second signal portion and the second signal portion. Power adjustment circuitry is configured to adjust a transmit power of the transmit signal according to a variation between the first gain relation and the second gain relation.

Abstract: The present disclosure relates to a transmitter for transmitting a transmit signal comprising a first signal portion and a second signal portion. The transmitter comprises a power amplifier configured to amplify the transmit signal. The power amplifier is prone to undesired gain variations during the first and the second signal portion. The transmitter further comprises a transmit feedback receiver coupled to an output of the power amplifier and configured to feed back the transmit signal to generate a fed back first signal portion and a fed back second signal portion. Processing circuitry is configured to determine a first gain relation between the fed back first signal portion and the first signal portion and to determine at least one second gain relation between the fed back second signal portion and the second signal portion. Power adjustment circuitry is configured to adjust a transmit power of the transmit signal according to a variation between the first gain relation and the second gain relation.

Abstract: A Digital Phase Locked Loop (DPLL), including a Time-to-Digital Converter (TDC) configured generate quantized phase values of a Voltage Controlled Oscillator (VCO) signal; and a frequency estimation circuit configured to receive the quantized phase values, determine wraparound phase of the quantized phase values, and least-squares estimate a frequency based on the quantized phase values and the wraparound phase.

Abstract: Methods and systems for calibrating a receiver utilizing a noise signal generated by a power amplifier associated with a transmitter are provided. A calibration method or mode includes generating a noise signal with a power amplifier associated with a transmitter of the transceiver; processing the noise signal with the receiver to generate a received signal; and calibrating the receiver based at least on the received signal.

Abstract: Some demonstrative embodiments include apparatuses, devices, systems and methods of radar detection. For example, an apparatus may include a first detector component to detect energy over a wireless communication channel; a second detector component to detect a signal over the wireless communication channel, and to determine at least a classification of the signal as a radar-type or a non-radar type; a storage component to store radar detection information corresponding to signals detected by the second detector component, the radar detection information including at least the classification of the signal and one or more characteristics of the signal; and a controller to activate the second detector component upon detection of the energy by the first detector component, the controller configured to cause a radar-detection analysis of the radar detection information corresponding to a predefined time period.

Abstract: Described herein are technologies related to an implementation of a closed-loop system to measure and compensate non-linearity in a transceiver circuitry of a device.