Patents by Inventor Roy Cideciyan

Roy Cideciyan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12124740
    Abstract: The present disclosure includes systems and methods for reducing rewrite overhead in a sequential access storage system. The method may comprise writing a data set to a sequential access medium using a magnetic head, wherein the data set comprises a plurality of encoded data blocks, classifying each of the plurality of encoded data blocks on the sequential access medium into one of at least three classes of write quality, and rewriting the encoded data blocks in a rewrite area of the sequential access medium based at least in part on the write quality class. In some embodiments, the at least three classes of write quality may comprise a hard rewrite class for which rewrites are necessary to prevent data loss, a soft rewrite class for which rewrites are desirable but not necessary, and a no rewrite class for which no rewrite is needed or desired.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: October 22, 2024
    Assignee: International Business Machines Corporation
    Inventors: Ernest Stewart Gale, Roy Cideciyan, Simeon Furrer, Masayuki Iwanaga, Keisuke Tanaka
  • Publication number: 20240231683
    Abstract: The present disclosure includes systems and methods for reducing rewrite overhead in a sequential access storage system. The method may comprise writing a data set to a sequential access medium using a magnetic head, wherein the data set comprises a plurality of encoded data blocks, classifying each of the plurality of encoded data blocks on the sequential access medium into one of at least three classes of write quality, and rewriting the encoded data blocks in a rewrite area of the sequential access medium based at least in part on the write quality class. In some embodiments, the at least three classes of write quality may comprise a hard rewrite class for which rewrites are necessary to prevent data loss, a soft rewrite class for which rewrites are desirable but not necessary, and a no rewrite class for which no rewrite is needed or desired.
    Type: Application
    Filed: October 24, 2022
    Publication date: July 11, 2024
    Inventors: Ernest Stewart Gale, Roy Cideciyan, Simeon Furrer, Masayuki Iwanaga, Keisuke Tanaka
  • Publication number: 20240134565
    Abstract: The present disclosure includes systems and methods for reducing rewrite overhead in a sequential access storage system. The method may comprise writing a data set to a sequential access medium using a magnetic head, wherein the data set comprises a plurality of encoded data blocks, classifying each of the plurality of encoded data blocks on the sequential access medium into one of at least three classes of write quality, and rewriting the encoded data blocks in a rewrite area of the sequential access medium based at least in part on the write quality class. In some embodiments, the at least three classes of write quality may comprise a hard rewrite class for which rewrites are necessary to prevent data loss, a soft rewrite class for which rewrites are desirable but not necessary, and a no rewrite class for which no rewrite is needed or desired.
    Type: Application
    Filed: October 23, 2022
    Publication date: April 25, 2024
    Inventors: Ernest Stewart Gale, Roy Cideciyan, Simeon Furrer, Masayuki Iwanaga, Keisuke Tanaka
  • Patent number: 11967342
    Abstract: Mechanisms are provided to receive encoded header information stored on a tape of a tape drive, wherein the encoded header information has been generated by: generating, for a plurality of tracks of the tape of the tape drive, a header information in a plurality of symbols, wherein the plurality of symbols is comprised of a first set of symbols and a second set of symbols, wherein the first set of symbols include identical information across all tracks of the plurality of tracks, and wherein the second set of symbols are configurable to include different information across all tracks of the plurality of tracks; and modifying, for writing to the tape of the tape drive, the first set of symbols of the plurality of tracks to include parity information corresponding to information included in the second set of symbols of the plurality of tracks. The received encoded header information is decoded.
    Type: Grant
    Filed: September 14, 2022
    Date of Patent: April 23, 2024
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kevin Dale Butt, Roy Cideciyan, Simeon Furrer, Masayuki Iwanaga, Keisuke Tanaka
  • Publication number: 20240087604
    Abstract: Mechanisms are provided to receive encoded header information stored on a tape of a tape drive, wherein the encoded header information has been generated by: generating, for a plurality of tracks of the tape of the tape drive, a header information in a plurality of symbols, wherein the plurality of symbols is comprised of a first set of symbols and a second set of symbols, wherein the first set of symbols include identical information across all tracks of the plurality of tracks, and wherein the second set of symbols are configurable to include different information across all tracks of the plurality of tracks; and modifying, for writing to the tape of the tape drive, the first set of symbols of the plurality of tracks to include parity information corresponding to information included in the second set of symbols of the plurality of tracks. The received encoded header information is decoded.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Kevin Dale BUTT, Roy CIDECIYAN, Simeon FURRER, Masayuki IWANAGA, Keisuke TANAKA
  • Publication number: 20240087605
    Abstract: Provided are a method, system, and computer program product in which mechanisms are provided to generate, for a plurality of tracks of a tape of a tape drive, a header information in a plurality of symbols, wherein the plurality of symbols is comprised of a first set of symbols and a second set of symbols, wherein the first set of symbols include identical information across all tracks of the plurality of tracks, and wherein the second set of symbols are configurable to include different information across all tracks of the plurality of track. A modification is made, for writing to the tape of the tape drive, of the first set of symbols of the plurality of tracks to include parity information corresponding to information included in the second set of symbols of the plurality of tracks.
    Type: Application
    Filed: September 14, 2022
    Publication date: March 14, 2024
    Inventors: Kevin Dale BUTT, Roy CIDECIYAN, Simeon FURRER, Masayuki IWANAGA, Keisuke TANAKA
  • Patent number: 11862194
    Abstract: A data storage system comprises: a head configured to produce a signal representing data stored on a storage medium; an estimator configured to determine an estimated signal comprising a superposition of an estimated linear portion of a partial-response equalizer output and an estimated nonlinear portion of the signal; a bank of noise whitening filters configured for filtering a difference between the signal and the estimated signal; a branch metric calculator configured to calculate branch metrics based on the filtered signal; and an adaptive data-dependent noise-predictive maximum likelihood sequence detector configured to generate an output stream representing the data based on the one or more branch metrics.
    Type: Grant
    Filed: December 1, 2022
    Date of Patent: January 2, 2024
    Assignee: International Business Machines Corporation
    Inventors: Roy Cideciyan, Simeon Furrer, Mark Alfred Lantz
  • Patent number: 11205131
    Abstract: Methods and apparatus are provided for calculating branch metrics, associated with possible transitions between states of a trellis, in a sequence detector for detecting symbol values corresponding to samples of an analog signal transmitted over a channel. For each sample and each transition, the method calculates a plurality of distance values indicative of distance between that sample and respective hypothesized sample values for that transition. In parallel with calculation of the distance values, the sample is compared with a set of thresholds, each defined between a pair of successive hypothesized symbol values arranged in value order, to produce a comparison result. An optimum distance value is selected as a branch metric for the transition in dependence on the comparison result.
    Type: Grant
    Filed: March 16, 2018
    Date of Patent: December 21, 2021
    Assignee: International Business Machines Corporation
    Inventors: Hazar Yüksel, Giovanni Cherubini, Roy Cideciyan, Simeon Furrer, Marcel Kossel
  • Patent number: 10937453
    Abstract: A methodology that enables, for example, tape drive operation at lower SNR and/or reduced rewrite area uses a first threshold T and a second threshold r for a rewrite condition. Codeword interleaves (CWIs) in a data set are written onto a plurality of simultaneously-written parallel tracks of a magnetic recording medium, read back and error correction decoded. A determination is made as to whether at least one of the C1 or C1? codewords in each decoded CWI contains more byte errors than the second threshold r of the rewrite condition. A number of CWIs in a rewrite buffer are according to the following criteria: bi?=bi?T when bi is greater than the first threshold T, and bi?=0 when bi is less than or equal to the first threshold T.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: March 2, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kevin Dale Butt, Roy Cideciyan, Simeon Furrer, Masayuki Iwanaga, Mark Alfred Lantz, Keisuke Tanaka
  • Publication number: 20190287011
    Abstract: Methods and apparatus are provided for calculating branch metrics, associated with possible transitions between states of a trellis, in a sequence detector for detecting symbol values corresponding to samples of an analog signal transmitted over a channel. For each sample and each transition, the method calculates a plurality of distance values indicative of distance between that sample and respective hypothesized sample values for that transition. In parallel with calculation of the distance values, the sample is compared with a set of thresholds, each defined between a pair of successive hypothesized symbol values arranged in value order, to produce a comparison result. An optimum distance value is selected as a branch metric for the transition in dependence on the comparison result.
    Type: Application
    Filed: March 16, 2018
    Publication date: September 19, 2019
    Inventors: Hazar Yüksel, Giovanni Cherubini, Roy Cideciyan, Simeon Furrer, Marcel Kossel
  • Patent number: 10256845
    Abstract: A method for timing recovery for a high-speed data transmission system may be provided. The method comprises receiving an analog input signal at an ADC and passing processed digital signal samples to a Viterbi detector. The method also comprises receiving at least one processed signal sample and at least two sets of at least one candidate symbol each from the Viterbi detector and/or the processed signal samples by timing error detectors and forwarding output digital signals of the timing error detectors via loop filters to related multiplexers. Furthermore, the method comprises selecting one digital signal from each of the multiplexers using a select signal generated by the Viterbi detector, and deriving a control signal controlling a sampling clock of the analog-to-digital converter by at least one of the selected digital signals from the multiplexers.
    Type: Grant
    Filed: February 26, 2018
    Date of Patent: April 9, 2019
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Hazar Yüksel, Giovanni Cherubini, Roy Cideciyan, Simeon Furrer, Marcel Kossel
  • Patent number: 9991990
    Abstract: Calculating path metrics, associated with respective states of an n-state trellis, by accumulating branch metrics in a sequence detector. Each path metric is represented by N bits plus a wrap-around bit for indicating wrap-around of the N-bit value of that path metric.
    Type: Grant
    Filed: June 8, 2017
    Date of Patent: June 5, 2018
    Assignee: International Business Machines Corporation
    Inventors: Giovanni Cherubini, Roy Cideciyan, Simeon Furrer, Marcel Kossel, Hazar Yüksel
  • Publication number: 20080055125
    Abstract: A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called preceding to the modulation encoded bit stream. However, this preceding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before preceding is applied by the precoder. The decoder subsystem operates in the inverse manner.
    Type: Application
    Filed: August 3, 2007
    Publication date: March 6, 2008
    Inventors: Roy CIDECIYAN, Ajay DHOLAKIA, Evangelos ELEFTHERIOU, Richard GALBRAITH, Weldon HANSON, Thomas MITTELHOLZER, Travis OENNING
  • Publication number: 20070044007
    Abstract: A method and apparatus for providing error correction capability to longitudinal position data are disclosed. Initially, data are encoded via a set of even LPOS words and a set of odd LPOS words. The encoded data are then decoded by generating a set of syndrome bits for each of the LPOS words. A determination is then made as to whether or not there is an error within one of the LPOS words based on its corresponding syndrome bits.
    Type: Application
    Filed: August 17, 2005
    Publication date: February 22, 2007
    Applicant: International Business Machines Corporation
    Inventors: Roy Cideciyan, Evangelos Eleftheriou, Glen Jaquette, Paul Seger
  • Publication number: 20060195775
    Abstract: A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.
    Type: Application
    Filed: February 28, 2005
    Publication date: August 31, 2006
    Inventors: Roy Cideciyan, Ajay Dholakia, Evangelos Eleftheriou, Richard Galbraith, Weldon Hanson, Thomas Mittelholzer, Travis Oenning
  • Publication number: 20060107182
    Abstract: Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave.
    Type: Application
    Filed: November 25, 2005
    Publication date: May 18, 2006
    Applicant: International Business Machines Corporation
    Inventors: Roy Cideciyan, Ajay Dholakia, Evangelos Eleftheriou, Thomas Mittelholzer
  • Publication number: 20060022847
    Abstract: A method and apparatus for data coding for high-density recording channels exhibiting low frequency contents is disclosed. Coding is used that satisfies both Running Digital Sum (RDS) and Maximum Transition Run (MTR) properties, which are desirable for achieving high-density recording for recording channels exhibiting low frequency components such as perpendicular magnetic recording channel.
    Type: Application
    Filed: July 30, 2004
    Publication date: February 2, 2006
    Inventors: Yuan Xing Lee, Ismail Demirkan, Richard Galbraith, Evangelos Eleftheriou, Roy Cideciyan
  • Publication number: 20050213241
    Abstract: An apparatus for providing dynamic equalizer optimization is disclosed. The present invention solves the above-described problems by providing equalizer coefficient updates that converge towards the same solution as the direct method without having to first write a known pattern to the disk or requiring any prior knowledge of the data already written on the disk. The adaptive cosine function may be used to modify only a DFIR tap set, only the j and k parameters of a cosine equalizer or to modify both the tap set for a DFIR filter and the j and k parameters of the cosine equalizer. Another algorithm, such as the LMS algorithm, may be used to modify parameters not modified by the cosine algorithm.
    Type: Application
    Filed: March 25, 2004
    Publication date: September 29, 2005
    Inventors: Roy Cideciyan, Ajay Dholakia, Evangelos Eleftheriou, Richard Galbraith, Weldon Hanson, Thomas Mittelholzer, Travis Oenning, Michael Ross, David Stanek
  • Publication number: 20050138518
    Abstract: A data storage system includes an encoder subsystem comprising an error correction code encoder, a modulation encoder, and a precoder, and a decoder subsystem similarly comprising a detector, an inverse precoder, a channel decoder, and an error correction code decoder. The error correction encoder applies an error correction code to the incoming user bit stream, and the modulation encoder applies so-called modulation or constrained coding to the error correction coded bit stream. The precoder applies so-called precoding to the modulation encoded bit stream. However, this precoding is applied to selected portions of the bit stream only. There can also be a permutation step where the bit sequence is permuted after the modulation encoder before precoding is applied by the precoder. The decoder subsystem operates in the inverse manner.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Roy Cideciyan, Ajay Dholakia, Evangelos Eleftheriou, Richard Galbraith, Weldon Hanson, Thomas Mittelholzer, Travis Oenning
  • Publication number: 20050078394
    Abstract: An apparatus for providing data dependent detection in a data read channel is disclosed. Parameters in a read channel are dynamically adjusted according to data dependent noise. For example, a comparison in an add-compare-select (ACS) unit of a Viterbi decoder may be adjusted or offset terms in error event filters may be biased to choose a Viterbi sequence with more transitions or to compensate for polarity dependent noise.
    Type: Application
    Filed: October 10, 2003
    Publication date: April 14, 2005
    Inventors: Roy Cideciyan, Ajay Dholakia, Evangelos Eleftheriou, Richard Galbraith, Thomas Mittelholzer, Travis Oenning