Abstract: Systems, apparatuses, and methods for error detection and recovery when streaming data are described. A system includes one or more companion direct memory access (DMA) subsystems for transferring data. When an error is detected for a component of the companion DMA subsystem(s), the operations performed by the other components need to gracefully adapt to this error so that operations face only a minimal disruption. For example, while one or more consumers are still consuming a first frame, a companion router receives an indication of an error for a second frame, causing the companion router to send a router frame abort message to a route manager. In response, the route manager waits until the consumer(s) are consuming the second frame before sending them a frame abort message. The consumer(s) flush their pipeline and transition to an idle state waiting for a third frame after receiving the frame abort message.

Abstract: Systems, apparatuses, and methods for error detection and recovery when streaming data are described. A system includes one or more companion direct memory access (DMA) subsystems for transferring data. When an error is detected for a component of the companion DMA subsystem(s), the operations performed by the other components need to gracefully adapt to this error so that operations face only a minimal disruption. For example, while one or more consumers are still consuming a first frame, a companion router receives an indication of an error for a second frame, causing the companion router to send a router frame abort message to a route manager. In response, the route manager waits until the consumer(s) are consuming the second frame before sending them a frame abort message. The consumer(s) flush their pipeline and transition to an idle state waiting for a third frame after receiving the frame abort message.

Abstract: An electronic device includes a display panel and image processing circuitry. The image processing circuitry receives input image data corresponding to an image to display on the display panel, modifies the input image data by executing a first context task (e.g., lower priority task), and receives a context switch request. The image processing circuitry also pauses modification of the input image data by pausing execution of the first context task and then switches to modifying the input image data by executing a second context task (e.g., higher priority task).

Abstract: An electronic device includes a display panel and image processing circuitry. The image processing circuitry receives input image data corresponding to an image to display on the display panel, modifies the input image data by executing a first context task (e.g., lower priority task), and receives a context switch request. The image processing circuitry also pauses modification of the input image data by pausing execution of the first context task and then switches to modifying the input image data by executing a second context task (e.g., higher priority task).

Abstract: An electronic device includes a display panel and image processing circuitry. The image processing circuitry receives input image data corresponding to an image to display on the display panel, modifies the input image data by executing a first context task (e.g., lower priority task), and receives a context switch request. The image processing circuitry also pauses modification of the input image data by pausing execution of the first context task and then switches to modifying the input image data by executing a second context task (e.g., higher priority task).

Abstract: An electronic device includes a display panel and image processing circuitry. The image processing circuitry receives input image data corresponding to an image to display on the display panel, modifies the input image data by executing a first context task (e.g., lower priority task), and receives a context switch request. The image processing circuitry also pauses modification of the input image data by pausing execution of the first context task and then switches to modifying the input image data by executing a second context task (e.g., higher priority task).

Abstract: Systems, apparatuses, and methods for performing scatter and gather direct memory access (DMA) streaming through a circular buffer are described. A system includes a circular buffer, producer DMA engine, and consumer DMA engine. After the producer DMA engine writes or skips over a given data chunk of a first frame to the buffer, the producer DMA engine sends an updated write pointer to the consumer DMA engine indicating that a data credit has been committed to the buffer and that the data credit is ready to be consumed. After the consumer DMA engine reads or skips over the given data chunk of the first frame from the buffer, the consumer DMA engine sends an updated read pointer to the producer DMA engine indicating that the data credit has been consumed and that space has been freed up in the buffer to be reused by the producer DMA engine.

Abstract: Embodiments of the present disclosure provide a method for estimating usage of a print substance. The method comprises receiving a plurality of pixels of a page to be printed, and generating, for one of the plurality of pixels, a look-up address based on (i) pixel bits of the one of the plurality of pixels, and (ii) pixel bits of one or more other pixels proximal to the one of the plurality of pixels. The method further comprises estimating an amount of print substance deposited on the page at a location associated with the one of the plurality of pixels based on reference to a print substance amount in a table of print substance amounts, wherein the reference to the print substance amount in the table is made using the look-up address.

Abstract: The present disclosure describes techniques and apparatuses for clone-resistant logic. In some aspects, this clone-resistant logic enables computing-device manufacturers to better protect their devices against use of inauthentic accessories.

Abstract: Some of the embodiments of the present disclosure provide an apparatus for processing a starting image, comprising: a first unit configured to provide starting pixel data from a selected portion of the starting image, wherein the selected portion is less than an entirety of the starting image; and a second unit configured to receive the starting pixel data from the first unit and to selectively provide to a look up table (LUT) an address of replacement pixel data for at least a pixel of the selected portion of the starting image. Other embodiments are also described and claimed.

Abstract: Some of the embodiments of the present disclosure provide a method comprising forming an array comprising a plurality of microcells, each microcell of the plurality of microcells including a plurality of pixels; for each pixel in each of the plurality of microcells, assigning (i) a respective pixel offset factor that is associated with a relative position of the pixel in the respective microcell, and (ii) a respective microcell offset factor that is associated with an index of the respective microcell; and for each pixel in each of the plurality of microcells, determining a respective final offset factor that is based at least in part on the respective pixel offset factor and the respective microcell offset factor. Other embodiments are also described and claimed.

Abstract: Embodiments of the present disclosure provide a method for estimating usage of a print substance. The method comprises receiving a plurality of pixels of a page to be printed, and generating, for one of the plurality of pixels, a look-up address based on (i) pixel bits of the one of the plurality of pixels, and (ii) pixel bits of one or more other pixels proximal to the one of the plurality of pixels. The method further comprises estimating an amount of print substance deposited on the page at a location associated with the one of the plurality of pixels based on reference to a print substance amount in a table of print substance amounts, wherein the reference to the print substance amount in the table is made using the look-up address.

Abstract: Some of the embodiments of the present disclosure provide a method comprising selecting a pixel window of image data, the pixel window including a target pixel, determining a stability of the pixel window, formulating a look up table address based at least in part on the determined stability, obtaining one or more image enhancement values from a look up table based at least in part on the formulated look up table address, and processing the target pixel based at least in part on the obtained one or more image enhancement values. Other embodiments are also described and claimed.

Abstract: A device for adjusting the timing of at least one edge of an output pulse created in response to a reference pulse is disclosed. Such a device may include a first memory circuit having two or more first memory cells and a second memory circuit also having two or more second memory cells. The first memory circuit may be configured to periodically sample the reference pulse at the rising edges of a first sample clock while the second memory circuit may be configured to periodically sample the reference pulse at the falling edges of the first sample clock. A combinatorial logic circuit may also be included to produce the output pulse having at least one adjusted edge based on a set of timing instructions and timing information provided by the first and/or second memory circuits.

Abstract: Some of the embodiments of the present disclosure provide a method comprising forming an array comprising a plurality of microcells, each microcell of the plurality of microcells including a plurality of pixels; for each pixel in each of the plurality of microcells, assigning (i) a respective pixel offset factor that is associated with a relative position of the pixel in the respective microcell, and (ii) a respective microcell offset factor that is associated with an index of the respective microcell; and for each pixel in each of the plurality of microcells, determining a respective final offset factor that is based at least in part on the respective pixel offset factor and the respective microcell offset factor. Other embodiments are also described and claimed.

Abstract: A method and apparatus for handshaking using a 2-wire protocol is described. An electronic component may be divided into blocks, with the blocks performing one or more functions. The blocks may be in series with one another to form a pipeline. The blocks may use interface circuitry to transfer information upstream from or downstream to another block. The interface circuitry uses the 2-wire handshaking for the transfer including a transmit readiness wire configured to carry a signal indicative of readiness of the upstream circuit to output data and a receive readiness wire configured to carry a signal indicative of readiness of the downstream circuit to receive the data.

Abstract: Some of the embodiments of the present disclosure provide a method comprising selecting a pixel window of image data, the pixel window including a target pixel, determining a stability of the pixel window, formulating a look up table address based at least in part on the determined stability, obtaining one or more image enhancement values from a look up table based at least in part on the formulated look up table address, and processing the target pixel based at least in part on the obtained one or more image enhancement values. Other embodiments are also described and claimed.

Abstract: A method and apparatus for handshaking using a 2-wire protocol is described. An electronic component may be divided into blocks, with the blocks performing one or more functions. The blocks may be in series with one another to form a pipeline. The blocks may use interface circuitry to transfer information upstream from or downstream to another block. The interface circuitry uses the 2-wire handshaking for the transfer including a transmit readiness wire configured to carry a signal indicative of readiness of the upstream circuit to output data and a receive readiness wire configured to carry a signal indicative of readiness of the downstream circuit to receive the data.

Abstract: An image processing method and device for processing multiple rows of pixels of an image simultaneously with a single instruction. The processing includes selecting a pixel window having a plurality of pixels of an image spanning across multiple rows and columns, building vertical and horizontal load registers to include the plurality of pixels of the selected pixel window, and simultaneously processing selected pixels of the plurality of pixels included in the vertical and horizontal load registers using a single instruction, wherein the vertical and horizontal load registers are shifted when the selected pixels are processed. Accordingly, a method and device for efficient processing of an image is provided.

Abstract: A device for adjusting the timing of at least one edge of an output pulse created in response to a reference pulse is disclosed. Such a device may include a first memory circuit having two or more first memory cells and a second memory circuit also having two or more second memory cells. The first memory circuit may be configured to periodically sample the reference pulse at the rising edges of a first sample clock while the second memory circuit may be configured to periodically sample the reference pulse at the falling edges of the first sample clock. A combinatorial logic circuit may also be included to produce the output pulse having at least one adjusted edge based on a set of timing instructions and timing information provided by the first and/or second memory circuits.