Abstract: Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension.

Abstract: The present invention provides a method for electrolessly depositing metal onto a substrate, comprising: exposing a surface of the substrate to a first solution including a surfactant; and exposing the surface, having residual surfactant from the first solution thereon, to a second solution including ions of an electroconductive metal element for plating the surface with the electroconductive metal while exposed to the second solution; wherein the surface is exposed to the first solution immediately prior to exposing the surface to the second solution.

Abstract: Circuit boards are manufactured by forming a substrate with a dielectric surface and laminating a metal foil onto the substrate. The metal foil is patterned to form a first wiring layer. A permanent photoimagable dielectric layer is formed over the wiring layer and via holes are formed through the dielectric layer over pads and conductors of the wiring layer. Holes are formed through the substrate and substrate surfaces including the photoimagable dielectric, walls of the via holes, and walls of the through holes subjected to an electroless copper plating process. The process includes seeding the surface, coating the surface with a first solution containing surfactant and electroplating in a second solution in which the level of surfactant is regulated by determining the surface tension and metering surfactant addition to the second solution depending on the determination of surface tension.

Abstract: A method for cleaning a copper-INVAR-copper laminate in an acid solution without inducing a galvanic etching of the INVAR. An initial step of the method forms a circuit element that includes a power supply, the laminate electrically coupled to a negative terminal of the power supply, and a conductive anode electrically coupled to a positive terminal of the power supply. The conductive anode may include a conductive material, such as titanium, that is preferably inert to an acid solution into which the laminate will be subsequently immersed. After turning on the power supply to a voltage between about 1 volts and about 10 volts, the laminate and conductive anode are immersed in the acid solution, so as to form a closed circuit with a voltage bias across acid copper-INVAR-copper interfaces. The voltage bias prevents galvanic action from occurring and therefore protects against galvanic etching of the INVAR.