Abstract: A technique includes fabricating a layered precursor including: depositing a first film including a first indium gallium selenide compound on a substrate; then depositing a second film including a CuSe compound; then heating the substrate, the first film and the second film to convert the CuSe compound in the second film to a Cu2-xSe (0.2=?x?1) compound; then reactively depositing a third film including a second indium gallium selenide compound to convert the first film, the second film and the third film into a CIGS absorber film; and forming nanoscale morphological asymmetries in the CIGS absorber film, wherein a surface portion of the CIGS absorber film has a distribution of grain sizes with gaps between most of their surface area characterized by reentrant angles which effectively trap light.

Abstract: An integrated circuit includes a radiation-triggered shutdown circuit that disables a critical aspect of the integrated circuit rendering the integrated circuit non-functional when the integrated circuit receives a predetermined radiation dose. That ensures integrated circuits including the radiation-triggered shutdown circuit are ITAR compliant.

Abstract: A structure and method is utilized to detect cracks, fissures, fractures, or other dislocations in an IC die. A conductive line in a metal layer is provided about the periphery of the IC die. A break in the conductive line indicates that the IC die is cracked. A JTAG interface can be utilized to provide an indication of whether the die is cracked.

Abstract: An integrated circuit includes a radiation-triggered shutdown circuit that disables a critical aspect of the integrated circuit rendering the integrated circuit non-functional when the integrated circuit receives a predetermined radiation dose. That ensures integrated circuits including the radiation-triggered shutdown circuit are ITAR compliant.

Abstract: An improved solder bump composition and method advantageously employs a thin low-alpha layer of lead (Pb) deposited in close proximity to alpha particle sensitive devices, while ordinary (i.e., low cost) Pb is used for the bulk of the solder bump. This approach allows for reduced overall cost while still providing protection from alpha-particle induced soft errors. The low-alpha layer reduces the flux of alpha particle into devices in two ways. First, the low-alpha layer is itself essentially Pb.sup.210 free and therefore alpha particle emissions from the low-alpha layer are negligible. Second, the low-alpha layer is substantially opaque to alpha particles emitted by the ordinary Pb which includes Pb.sup.210. As a result, sensitive circuits on a semiconductor chip employing the improved solder bump are shielded from alpha particle emissions of the low-cost Pb.sup.210 -containing portion of a solder bump.

Abstract: An improved solder bump composition and method advantageously employs a thin low-alpha layer of lead (Pb) deposited in close proximity to alpha particle sensitive devices, while ordinary (i.e., low cost) Pb is used for the bulk of the solder bump. This approach allows for reduced overall cost while still providing protection from alpha-particle induced soft errors. The low-alpha layer reduces the flux of alpha particle into devices in two ways. First, the low-alpha layer is itself essentially Pb.sup.210 free and therefore alpha particle emissions from the low-alpha layer are negligible. Second, the low-alpha layer is substantially opaque to alpha particles emitted by the ordinary Pb which includes Pb.sup.210. As a result, sensitive circuits on a semiconductor chip employing the improved solder bump are shielded from alpha particle emissions of the low-cost Pb.sup.210 -containing portion of a solder bump.