Patents by Inventor Roy Mathieu

Roy Mathieu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10040432
    Abstract: Methods and systems are provided for automatically maintaining cleanliness of an vehicle. In one embodiment, a method includes: receiving, by a processor, at least one sensor signal from a sensor that monitors for particulates within an interior of a vehicle; determining, by the processor, a level of uncleanliness of the vehicle based on the sensor signal; and selectively generating, by the processor, at least one of a control signal to a cleaning element of the vehicle and a notification message based on the determining to achieve the level of cleanliness.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: August 7, 2018
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Louise E. Stauffer, Spencer W. Chamberlain, Joseph Neighbors, Mary E. Decaluwe, Jim K. Rainbolt, Janet S. Goings, William J. Ochalek, Joseph F. Szczerba, Roy Mathieu, Paul W. Alexander, Dorel Sala, David R. Fischer, Joseph M. Bilderbeck, Ann K. Duffy, Sandra N. Thomson
  • Publication number: 20170210352
    Abstract: Methods and systems are provided for automatically maintaining cleanliness of an vehicle. In one embodiment, a method includes: receiving, by a processor, at least one sensor signal from a sensor that monitors for particulates within an interior of a vehicle; determining, by the processor, a level of uncleanliness of the vehicle based on the sensor signal; and selectively generating, by the processor, at least one of a control signal to a cleaning element of the vehicle and a notification message based on the determining to achieve the level of cleanliness.
    Type: Application
    Filed: January 24, 2017
    Publication date: July 27, 2017
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: LOUISE E. STAUFFER, SPENCER W. CHAMBERLAIN, JOSEPH NEIGHBORS, MARY E. DECALUWE, JIM K. RAINBOLT, JANET S. GOINGS, WILLIAM J. OCHALEK, JOSEPH F. SZCZERBA, ROY MATHIEU, PAUL W. ALEXANDER, DOREL SALA, DAVID R. FISCHER, JOSEPH M. BILDERBECK, ANN K. DUFFY, SANDRA N. THOMSON
  • Patent number: 6580100
    Abstract: A vertical voltage-controlled bidirectional monolithic switch formed between the upper and lower surfaces of a semiconductor substrate surrounded with a peripheral wall, including: a first multiple-cell vertical IGBT transistor extending between a cathode formed on the upper surface side and an anode formed on the lower surface side; and a second multiple-cell vertical IGBT transistor extending between a cathode formed on the lower surface side and an anode formed on the upper surface side, in which the cells of each transistor are arranged so that portions of the cells of a transistor are active upon operation of the other transistor.
    Type: Grant
    Filed: September 19, 2002
    Date of Patent: June 17, 2003
    Assignee: STMicroelectronics S.A.
    Inventor: Roy Mathieu
  • Publication number: 20030057480
    Abstract: A vertical voltage-controlled bidirectional monolithic switch formed between the upper and lower surfaces of a semiconductor substrate surrounded with a peripheral wall, including: a first multiple-cell vertical IGBT transistor extending between a cathode formed on the upper surface side and an anode formed on the lower surface side; and a second multiple-cell vertical IGBT transistor extending between a cathode formed on the lower surface side and an anode formed on the upper surface side, in which the cells of each transistor are arranged so that portions of the cells of a transistor are active upon operation of the other transistor.
    Type: Application
    Filed: September 19, 2002
    Publication date: March 27, 2003
    Inventor: Roy Mathieu
  • Publication number: 20010011717
    Abstract: A method for manufacturing a vertical power component on a substrate formed of a lightly-doped silicon wafer, including the steps of boring on the lower surface side of the substrate a succession of holes perpendicular to this surface; diffusing a dopant from the holes, of a second conductivity type opposite to that of the substrate; and boring similar holes on the upper surface side of the substrate to define an isolating wall and diffuse from these holes a dopant of the second conductivity type with a high doping level, the holes corresponding to the isolating wall being sufficiently close for the diffused areas to join laterally and vertically.
    Type: Application
    Filed: December 22, 2000
    Publication date: August 9, 2001
    Inventor: Roy Mathieu