Abstract: Embodiments of a microelectronic package include a package body, radio frequency (RF) circuitry contained in the package body, and a topside input/output (I/O) interface formed on an exterior surface of the package body, and a coaxially-shielded RF interposer. The first coaxially-shielded RF interposer includes a dielectric interposer body, a first signal-carrying via electrically coupled to a topside signal terminal included in the topside I/O interface, and a first coaxial shield structure. The first coaxial shield structure is bonded to the dielectric interposer body, is electrically coupled to a first topside ground terminal further included in the topside I/O interface, and extends at least at least partially around an outer periphery of the signal-carrying via.

Abstract: An RF power amplifier includes an amplifier device and a shunt-inductance circuit. The amplifier device includes a substrate, a combining node lead, first and second amplifier dies coupled to the substrate, and first and second output circuits. The first and second amplifier dies are configured to amplify first and second input RF signals, respectively, to produce first and second output RF signals at first and second output terminals, respectively. The first output circuit includes a first inductive path connecting the first output terminal to the lead. The second output circuit includes a second inductive path connecting the second output terminal to the lead. The lead is configured to combine the first and second output RF signals to produce a third output RF signal. The shunt-inductance circuit is coupled between the first output terminal and a ground reference.

Abstract: An RF power amplifier includes an amplifier device and a shunt-inductance circuit. The amplifier device includes a substrate, a combining node lead, first and second amplifier dies coupled to the substrate, and first and second output circuits. The first and second amplifier dies are configured to amplify first and second input RF signals, respectively, to produce first and second output RF signals at first and second output terminals, respectively. The first output circuit includes a first inductive path connecting the first output terminal to the lead. The second output circuit includes a second inductive path connecting the second output terminal to the lead. The lead is configured to combine the first and second output RF signals to produce a third output RF signal. The shunt-inductance circuit is coupled between the first output terminal and a ground reference.

Abstract: A Doherty power amplifier includes input circuitry that provides input signals to carrier and peaking amplifiers with an input phase offset between 20 degrees and 160 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, consists of two, series-connected transmission line segments. The matching circuit provides a complex impedance, ZL, with a non-zero reactive portion, xn. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n*180 degrees (n=an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, ?x, equal to an absolute value of the input phase offset when the electrical length of the peaking output circuit is 0 degrees.

Abstract: A Doherty power amplifier includes input circuitry that provides input signals to asymmetric carrier and peaking amplifiers (e.g., a peaking-to-carrier size ratio, ? is greater than 1.15) with an absolute value of an input phase offset between 15 degrees and 165 degrees or between 195 degrees and 345 degrees. Carrier and peaking amplifier output signals are combined at a combining node. A complex combining load matching circuit, which is connected to the combining node, provides a complex impedance, ZL, with a non-zero reactive portion, xn. The output circuit between the peaking amplifier and the combining node has an electrical length of 0 or n*180 degrees (n=an integer value). The output circuit between the carrier amplifier and the combining node has an electrical length, ?x, where a difference between the electrical lengths of the peaking output circuit and the carrier output circuit is equal to the input phase offset.

Abstract: An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

Abstract: An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

Abstract: A Doherty amplifier has a first amplifier path that includes a first amplifier, a second amplifier path that includes a second amplifier, a power divider, and a short-circuited stub. The power divider receives an RF signal and divides the RF signal into first and second input signals. The power divider includes first and second power divider outputs that produce the first and second input signals, respectively. The short-circuited stub is coupled between the first power divider output and the first amplifier or between the second power divider output and the second amplifier. The first and second amplifier paths are characterized by first and second frequency-dependent insertion phases, respectively. A slope of the first or second frequency-dependent insertion phase is altered by the short-circuited stub. The power divider produces the first and second input signals with a quadrature phase shift.

Abstract: An amplifier package may include a transistor, an output impedance matching circuit and one or more radial stub harmonic traps coupled to a control terminal of the transistor or to an output terminal of the transistor. The output impedance matching circuit and the radial stub harmonic traps may be formed on a single substrate or separate substrates, which may be formed from gallium nitride. Each radial stub harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof.

Abstract: An amplifier may include a transistor and input and output matching networks. One or more harmonic trap circuits may be electrically connected to a node located between the input matching network and a gate terminal of the transistor or to a node located between the output matching network and a drain terminal of the transistor. Each harmonic trap may provide a low resistance path to ground for signal energy above a fundamental operating frequency of the amplifier, such as harmonic frequencies thereof. The output matching network may act as an impedance inverter that provides a 90 degree insertion phase between the input of the output matching network and the load. A variable length drain feeder may connect a voltage source to an output of the output matching network.

Abstract: A Doherty amplifier has a first amplifier path that includes a first amplifier, a second amplifier path that includes a second amplifier, a power divider, and a short-circuited stub. The power divider receives an RF signal and divides the RF signal into first and second input signals. The power divider includes first and second power divider outputs that produce the first and second input signals, respectively. The short-circuited stub is coupled between the first power divider output and the first amplifier or between the second power divider output and the second amplifier. The first and second amplifier paths are characterized by first and second frequency-dependent insertion phases, respectively. A slope of the first or second frequency-dependent insertion phase is altered by the short-circuited stub. The power divider produces the first and second input signals with a quadrature phase shift.

Abstract: An amplifier includes first, second, and third inputs to receive an RF signal, first and second amplifiers, and an input phase adjustment circuit coupling the first, second, and third inputs to the first and second amplifiers, the input phase adjustment circuit having first and second outputs coupled to the first and second amplifiers, respectively. The input phase adjustment circuit includes a pair of inputs, where the pair of inputs includes the first and second inputs, for the first output and a pair of phase adjustment paths coupling the pair of inputs to the first output, respectively. The pair of phase adjustment paths are configured to adjust a phase of the RF signal differently for the first output.

Abstract: An embodiment of a Doherty amplifier includes first and second amplifier paths with first and second amplifiers, respectively, a power divider, a series delay element, and a short-circuited stub. The power divider is configured to receive a radio frequency (RF) signal and to divide the RF signal into first and second input signals that are produced at first and second power divider outputs. The series delay element is coupled between the first power divider output and the first amplifier. The short-circuited stub is coupled between the first power divider output and the first amplifier or between the second power divider output and the second amplifier. The first amplifier path is characterized by a first frequency-dependent insertion phase, the second amplifier path is characterized by a second frequency-dependent insertion phase, and a slope of the first or second frequency-dependent insertion phase is altered by the short-circuited stub.

Abstract: A circuit includes a first amplifier path configured to carry a first radio frequency signal, a second amplifier path configured to carry a second radio frequency signal, a first resonator connected to the first and second amplifier paths, the first resonator being configured to resonate at a radio frequency to isolate the first and second radio frequency signals from one another and further configured to pass signals at a baseband frequency, and a second resonator coupling the first resonator and a reference voltage node, the second resonator being configured to pass signals at the baseband frequency to the reference voltage node.

Abstract: An embodiment of a Doherty amplifier includes first and second amplifier paths with first and second amplifiers, respectively, a power divider, a series delay element, and a short-circuited stub. The power divider is configured to receive a radio frequency (RF) signal and to divide the RF signal into first and second input signals that are produced at first and second power divider outputs. The series delay element is coupled between the first power divider output and the first amplifier. The short-circuited stub is coupled between the first power divider output and the first amplifier or between the second power divider output and the second amplifier. The first amplifier path is characterized by a first frequency-dependent insertion phase, the second amplifier path is characterized by a second frequency-dependent insertion phase, and a slope of the first or second frequency-dependent insertion phase is altered by the short-circuited stub.

Abstract: An RF amplifier includes a transistor, a shunt circuit, an envelope frequency termination circuit, and an extra lead. The shunt circuit is coupled between a transistor current carrying terminal and a ground reference node. The shunt circuit has a shunt inductive element and a shunt capacitor coupled in series, with an RF cold point node between the shunt inductive element and the shunt capacitor. The envelope frequency termination circuit is coupled between the RF cold point node and the ground reference node. The envelope frequency termination circuit has an envelope resistor, an envelope inductive element, and an envelope capacitor coupled in series. The extra lead is electrically coupled to the RF cold point node. The extra lead provides a lead inductance in parallel with an envelope inductance provided by the envelope inductive element. An additional shunt capacitor can be coupled between the extra lead and ground.

Abstract: Embodiments of a Doherty amplifier device are provided, where the device includes a main amplifier that produces a first RF signal with a variable first output power and a peaking amplifier that produces a second RF signal with a variable second output power equivalent to the first output power multiplied by a power ratio n greater than one; first and second RF signals combined in phase at a combining node; and a main output matching network (OMN), wherein the main OMN forms a portion of an equivalent main path transmission line having a characteristic impedance equivalent to (n+1)·?{square root over (Ropt·R0)}, wherein Ropt is a load impedance seen at the main amplifier intrinsic current generator plane during a full power condition of the Doherty amplifier device and (n+1)·R0 is a load impedance seen at the combining node during a back-off power condition of the Doherty amplifier device.

Abstract: Embodiments of a Doherty amplifier device are provided, where the device includes a main amplifier that produces a first RF signal with a variable first output power and a peaking amplifier that produces a second RF signal with a variable second output power equivalent to the first output power multiplied by a power ratio n greater than one; first and second RF signals combined in phase at a combining node; and a main output matching network (OMN), wherein the main OMN forms a portion of an equivalent main path transmission line having a characteristic impedance equivalent to ( n + 1 ) · Ropt · R ? ? 0 , wherein Ropt is a load impedance seen at the main amplifier intrinsic current generator plane during a full power condition of the Doherty amplifier device and R0 is a load impedance seen at the combining node during a back-off power condition of the Doherty amplifier device.

Abstract: An amplifier includes first, second, and third inputs to receive an RF signal, first and second amplifiers, and an input phase adjustment circuit coupling the first, second, and third inputs to the first and second amplifiers, the input phase adjustment circuit having first and second outputs coupled to the first and second amplifiers, respectively. The input phase adjustment circuit includes a pair of inputs, where the pair of inputs includes the first and second inputs, for the first output and a pair of phase adjustment paths coupling the pair of inputs to the first output, respectively. The pair of phase adjustment paths are configured to adjust a phase of the RF signal differently for the first output.

Abstract: A Doherty amplifier includes an output combining network that has a first combining network input coupled to a main amplifier path, a lowest-order combining network input coupled to a lowest-order peaking amplifier path, and N?2 additional combining network inputs coupled to other peaking amplifier paths. A final summing node is coupled to the combining network output, and is directly coupled to the first combining network input. N?2 intermediate summing nodes are coupled to the N?2 additional combining network inputs. An offset line is coupled between the lowest-order combining network input and a lowest-order summing node. A longest phase delay imparted by the output combining network on a peaking RF signal between the lowest-order combining network input and the final summing node is greater than all other phase delays imparted on any other RF signal provided to the first combining network input and the N?2 additional combining network inputs.