Patents by Inventor Roy Moss

Roy Moss has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11940621
    Abstract: An apparatus comprises: a first integrated circuit comprising: a plurality of sets of optical waveguides, each set of optical waveguides including a plurality of optical waveguide segments, and a plurality of optical emitter elements arranged over a first surface of the first integrated circuit, each optical emitter element coupled to a distal end of one of the optical waveguide segments; and a second integrated circuit comprising: a plurality of optical phase shifters that each provide a phase-shifted optical wave that is coupled to the first integrated circuit from a first edge surface of the second integrated circuit. The first edge surface of the second integrated circuit is in proximity to a row of proximal ends of the optical waveguide segments of a first set of the plurality of sets of optical waveguides.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: March 26, 2024
    Assignee: Analog Photonics LLC
    Inventors: Michael Robert Watts, Ehsan Shah Hosseini, Benjamin Roy Moss, Christopher Vincent Poulton
  • Publication number: 20230324763
    Abstract: Operating an OPA includes: applying, by each phase shifter element an optical phase shift to an optical wave that propagates through the phase shifter element and propagates to a corresponding emitter element, where the optical phase shift is based on an electrical signal provided to the phase shifter element; providing, by each driver element an electrical signal to at least one of the phase shifter elements based on a digital code value received at an input of the driver element; and computing one or more digital code values that are provided to respective inputs of driver elements in the array of driver elements based on processing OPA control information. The processing includes: computing optical phase shift information based at least in part on the OPA control information, and computing a corresponding digital code value based at least in part on the optical phase shift information.
    Type: Application
    Filed: April 5, 2023
    Publication date: October 12, 2023
    Applicant: Analog Photonics LLC
    Inventors: Benjamin Roy Moss, Peter Nicholas Russo, Oleg Shatrovoy, Christopher Vincent Poulton
  • Patent number: 11762146
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: September 19, 2023
    Assignee: Analog Photonics LLC
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Vincent Poulton, Peter Nicholas Russo
  • Publication number: 20220244454
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Application
    Filed: April 13, 2022
    Publication date: August 4, 2022
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Vincent Poulton, Peter Nicholas Russo
  • Publication number: 20220146903
    Abstract: An apparatus includes: an optical phased array (e.g., on a photonic integrated circuit), a focusing element, which can be at a fixed position relative to the optical phased array and configured to receive an optical beam from the optical phased array, and a steering element, which can be at a fixed position relative to the focusing element and configured to transmit the optical beam received from the focusing element. In some implementations, at least one of the focusing element or the steering element is externally coupled to the photonic integrated circuit.
    Type: Application
    Filed: October 14, 2021
    Publication date: May 12, 2022
    Inventors: Michael Robert Watts, Katia Shtyrkova, Christopher Vincent Poulton, Ehsan Shah Hosseini, Benjamin Roy Moss
  • Patent number: 11320585
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: May 3, 2022
    Assignee: Analog Photonics LLC
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Vincent Poulton, Peter Nicholas Russo
  • Publication number: 20220075186
    Abstract: An apparatus comprises: a first integrated circuit comprising: a plurality of sets of optical waveguides, each set of optical waveguides including a plurality of optical waveguide segments, and a plurality of optical emitter elements arranged over a first surface of the first integrated circuit, each optical emitter element coupled to a distal end of one of the optical waveguide segments; and a second integrated circuit comprising: a plurality of optical phase shifters that each provide a phase-shifted optical wave that is coupled to the first integrated circuit from a first edge surface of the second integrated circuit. The first edge surface of the second integrated circuit is in proximity to a row of proximal ends of the optical waveguide segments of a first set of the plurality of sets of optical waveguides.
    Type: Application
    Filed: September 2, 2021
    Publication date: March 10, 2022
    Applicant: Analog Photonics LLC
    Inventors: Michael Robert Watts, Ehsan Shah Hosseini, Benjamin Roy Moss, Christopher Vincent Poulton
  • Publication number: 20210278707
    Abstract: Controlling an optical phased array includes applying optical phase shifts by an array of phase shifter (PS) elements, each PS element applying an optical phase shift based on an input voltage signal applied across first and second terminals of the PS element, providing output voltage signals from an array of driver elements. During a charging time period, each driver element provides an output voltage signal to determine a corresponding input voltage signal applied across at least one of the PS elements; an array of switches control connectivity between the driver elements and respective PS elements; and all of the second terminals of all of the PS elements in the array of PS elements are maintained at a common voltage. The total number of switches in the array of switches is at least as large as the total number of PS elements in the array of PS elements.
    Type: Application
    Filed: March 4, 2021
    Publication date: September 9, 2021
    Inventors: Benjamin Roy Moss, Erman Timurdogan, Christopher Vincent Poulton, Shahriar Shahramian
  • Patent number: 10884673
    Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: January 5, 2021
    Assignee: CRYPTOGRAPHY RESEARCH, INC.
    Inventors: Ambuj Kumar, Roy Moss
  • Publication number: 20200379172
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Application
    Filed: August 14, 2020
    Publication date: December 3, 2020
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Vincent Poulton, Peter Nicholas Russo
  • Patent number: 10775559
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: September 15, 2020
    Assignee: Analog Photonics LLC
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Poulton, Peter Nicholas Russo
  • Patent number: 10587344
    Abstract: Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: March 10, 2020
    Assignee: Massachusetts Institute of Technology
    Inventors: Benjamin Roy Moss, Jason Scott Orcutt, Vladimir Marko Stojanovic
  • Publication number: 20200026474
    Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.
    Type: Application
    Filed: July 31, 2019
    Publication date: January 23, 2020
    Inventors: Ambuj Kumar, Roy Moss
  • Patent number: 10379785
    Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: August 13, 2019
    Assignee: Cryptography Research, Inc
    Inventors: Ambuj Kumar, Roy Moss
  • Publication number: 20190243081
    Abstract: A plurality of waveguide structures are formed in at least one silicon layer of a first member. The first member includes: a first surface of a first silicon dioxide layer that is attached to a second member that consists essentially of an optically transmissive material having a thermal conductivity less than about 50 W/(m·K), and a second surface of material that was deposited over at least some of the plurality of waveguide structures. An array of phase shifters is formed in one or more layers of the first member. An array of temperature controlling elements are in proximity to the array of phase shifters.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Inventors: Michael Robert Watts, Benjamin Roy Moss, Ehsan Shah Hosseini, Christopher Poulton, Peter Nicholas Russo
  • Publication number: 20190149240
    Abstract: Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded.
    Type: Application
    Filed: October 3, 2018
    Publication date: May 16, 2019
    Applicant: Massachusetts Institute of Technology
    Inventors: Benjamin Roy Moss, Jason Scott Orcutt, Vladimir Marko Stojanovic
  • Patent number: 10135539
    Abstract: Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded.
    Type: Grant
    Filed: February 15, 2013
    Date of Patent: November 20, 2018
    Assignee: Massachusetts Institute of Technology
    Inventors: Benjamin Roy Moss, Jason Scott Orcutt, Vladimir Marko Stojanovic
  • Publication number: 20160335196
    Abstract: A virtual memory including virtual addresses may be generated. A first virtual address of the virtual memory may be mapped to a first physical address of a one-time programmable (OTP) memory of a device. Furthermore, a second virtual address of the virtual memory may be mapped to a second physical address of a static memory of the device. The virtual memory that is mapped to the OTP memory and the static memory may be provided for accessing of the data of the OTP memory of the device.
    Type: Application
    Filed: May 12, 2016
    Publication date: November 17, 2016
    Inventors: Ambuj Kumar, Roy Moss
  • Publication number: 20160013867
    Abstract: Devices and techniques for integrated optical data communication. A method of encoding symbols in an optical signal may include encoding a first symbol by injecting charge carriers, at a first rate, into a semiconductor device, such as a PIN diode. The method may also include encoding a second symbol by injecting charge carriers, at a second rate, into the semiconductor device. The first rate may exceed the second rate. A modulator driver circuit may include a resistive circuit coupled between supply terminal and drive terminals. The modulator driver circuit may also include a control circuit coupled between a data terminal and the resistive circuit. The control circuit may modulate a resistance of the resistive circuit by selectively coupling one or more of a plurality of portions of the resistive circuit to the drive terminal based on data to be optically encoded.
    Type: Application
    Filed: February 15, 2013
    Publication date: January 14, 2016
    Applicant: Massachusetts Institute of Technology
    Inventors: Benjamin Roy Moss, Jason Scott Orcutt, Vladimir Marko Stojanovic
  • Patent number: 8717628
    Abstract: Some of the embodiments of the present disclosure provide an apparatus for processing a starting image, comprising: a first unit configured to provide starting pixel data from a selected portion of the starting image, wherein the selected portion is less than an entirety of the starting image; and a second unit configured to receive the starting pixel data from the first unit and to selectively provide to a look up table (LUT) an address of replacement pixel data for at least a pixel of the selected portion of the starting image. Other embodiments are also described and claimed.
    Type: Grant
    Filed: June 14, 2011
    Date of Patent: May 6, 2014
    Assignee: Marvell International Ltd.
    Inventors: Roy Moss, Douglas Keithley, Nilotpal Sensarkar