Abstract: A digital time phase shifter for shifting a signal in very precise increments and which performs the steps of: mixing a reference frequency signal with the signal to be time or phase delayed for generating an intermediate frequency signal; selectively delaying (i.e. advancing or retarding) the intermediate frequency signal; and mixing the delayed intermediate frequency signal and reference signal developing an output signal whose frequency is an integer multiple or sub-multiple of the input signal frequency and whose phase delay is proportional to the ratio of the intermediate signal and input signal frequencies. Small delay increments are obtained by judicious selection of the reference frequency. The output frequency may be slowly delayed relative to the input frequency by repeating the delay step. The phase shifter employs a pair of phase-locked loops, digital mixing circuits and a programmable delay generator.