Abstract: An interface circuit having a first reference terminal and a first input terminal for receiving a first input current signal, referenced to said first reference terminal from a first input current signal source. The circuit also has a second reference terminal and a second input terminal for receiving a second input current signal referenced to said second reference terminal from a second input current signal source. The second input current signal has a first and second signal current level. The interface circuit comprises a first receiver means coupled between the first input terminal and a first receiver means reference terminal. The first receiver means is responsive to the first input current signal first and second signal current levels for providing a first output signal at respective first and second levels. The first output signal is referenced to the second reference potential at a first signal output terminal.

Abstract: A dc power switch responsive to an input signal referenced to a signal reference terminal and having a power input terminal connected to a dc voltage source and a power output terminal connected to a load. The dc switch has an isolated voltage source referenced to the signal reference terminal; a current limiting resistor; and a two-pole switching circuit for coupling the isolated voltage source to the current limiting resistor. An output switching circuit couples current from the voltage source via the conduction channel to the signal reference terminal. A sense resistor has a first terminal coupled to the signal reference terminal and a second terminal coupled to the power output terminal. A SCR switching circuit latches into a conducting state in response to the firing signal and shunting current from the isolated source via the current limiting resistor second terminal to the power output terminal thereby shunting the control signal high state to a control signal low state in response to the firing.

Abstract: A solid state dc switch for switching power from the positive terminal of a ground referenced dc voltage source to the terminal of a ground referenced load. The solid state switch has a divide-by-two circuit means responsive to a clock signal and to a control signal first state for providing first and second symmetrical output signals at a frequency of one-half the frequency of said clock frequency. It also has a transformer drive and rectifier means for providing an isolated dc signal. An isolated switching means is included which is responsive to the high state of an isolated dc signal, having a transistor switch having a collector, an emitter and a base, the collector being coupled to a positive terminal of a ground referenced voltage source. The emitter is coupled to the return of the ground referenced load. The base is coupled to an isolated dc signal.