Patents by Inventor Roya Yaghmai

Roya Yaghmai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10677815
    Abstract: An example test system has resources that are distributed for access by a device under test (DUT). The example test system includes a device interface board (DIB) having sites to connect to devices to test, and a tester having slots configured to hold test instruments. Each test instrument has resources that are distributed over a dimension of the DIB. The resources are distributed to enable the devices in the sites equal access to the resources.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: June 9, 2020
    Assignee: Teradyne, Inc.
    Inventors: Mohamadreza Ray Mirkhani, Kevin P. Manning, Roya Yaghmai, Timothy Lee Farris, Frank Parrish
  • Publication number: 20190377007
    Abstract: An example test system has resources that are distributed for access by a device under test (DUT). The example test system includes a device interface board (DIB) having sites to connect to devices to test, and a tester having slots configured to hold test instruments. Each test instrument has resources that are distributed over a dimension of the DIB. The resources are distributed to enable the devices in the sites equal access to the resources.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 12, 2019
    Inventors: Mohamadreza Ray Mirkhani, Kevin P. Manning, Roya Yaghmai, Timothy Lee Farris, Frank Parrish
  • Patent number: 8201328
    Abstract: In one implementation, a method is provided for constructing an interface module which includes constructing a board having a signal via through the board, and having at least one ground via extending through the board. The method further includes back drilling the signal via to create a center conductor hole above a remaining portion of the signal via and back drilling a shield opening in the board and at least part way into the at least one ground via such that a height of the center conductor hole is reduced. The method further includes plating the shield opening and the center conductor hole, and back drilling to remove a portion of the plating to electrically isolate the plated shield opening and the plated center conductor hole.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: June 19, 2012
    Assignee: Tyco Electronics Corporation
    Inventors: Roya Yaghmai, Frank B. Parrish, Daniel DeLessert
  • Patent number: 7977583
    Abstract: A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: July 12, 2011
    Assignee: Teradyne, Inc.
    Inventors: Roya Yaghmai, Frank B. Parrish, Steven Hauptman
  • Patent number: 7815466
    Abstract: In one embodiment, an interface module is provided for connecting a plurality of signal paths to a high signal density interface. The interface module includes a board having axial conductor receptacles. The axial conductor receptacles have at least one ground via extending through the board to an interface side of the board and a shield receiving hole in the board extending into the board from a cable side of the board. At least a portion of the at least one ground via being exposed within the shield receiving hole, the shield receiving hole having a plating therein contacting the portion of the at least one ground via exposed within the shield receiving hole. The axial conductor receptacles have a plated center conductor receiving hole in the board, which extends to a signal via. The signal via extends from the center conductor hole to the interface side of the board. A non-plated hole in the board is located between the plated center conductor hole and the shield receiving hole.
    Type: Grant
    Filed: December 4, 2008
    Date of Patent: October 19, 2010
    Assignee: Teradyne, Inc.
    Inventors: Roya Yaghmai, Frank B. Parrish, Daniel DeLessert
  • Patent number: 7649375
    Abstract: In one embodiment, a laminated printed circuit board translator is provided. In some embodiments, the translator includes a receiving board adapted to receive a pin, the receiving board includes a plated via extending through the receiving board and has a hole for receiving a pin. An interface board laminated with the receiving board has a controlled depth via extending through it to contact a conductive trace. The conductive trace extends between the receiving board and the interface board to connect the plated via of the receiving board with the controlled depth via of the interface board. The controlled depth via is configured so that it is capable of being plated through a single sided drilled opening in the interface board. Some embodiments have a pad on the interface board connected to the controlled depth via.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: January 19, 2010
    Assignee: TERADYNE, Inc.
    Inventors: Arash Behziz, Roya Yaghmai
  • Publication number: 20090258538
    Abstract: In one implementation, a method is provided for constructing an interface module which includes constructing a board having a signal via through the board, and having at least one ground via extending through the board. The method further includes back drilling the signal via to create a center conductor hole above a remaining portion of the signal via and back drilling a shield opening in the board and at least part way into the at least one ground via such that a height of the center conductor hole is reduced. The method further includes plating the shield opening and the center conductor hole, and back drilling to remove a portion of the plating to electrically isolate the plated shield opening and the plated center conductor hole.
    Type: Application
    Filed: December 4, 2008
    Publication date: October 15, 2009
    Inventors: Roya Yaghmai, Frank B. Parrish, Daniel DeLessert
  • Publication number: 20090176406
    Abstract: In one embodiment, an interface module is provided for connecting a plurality of signal paths to a high signal density interface. The interface module includes a board having axial conductor receptacles. The axial conductor receptacles have at least one ground via extending through the board to an interface side of the board and a shield receiving hole in the board extending into the board from a cable side of the board. At least a portion of the at least one ground via being exposed within the shield receiving hole, the shield receiving hole having a plating therein contacting the portion of the at least one ground via exposed within the shield receiving hole. The axial conductor receptacles have a plated center conductor receiving hole in the board, which extends to a signal via. The signal via extends from the center conductor hole to the interface side of the board. A non-plated hole in the board is located between the plated center conductor hole and the shield receiving hole.
    Type: Application
    Filed: December 4, 2008
    Publication date: July 9, 2009
    Inventors: Roya Yaghmai, Frank B. Parrish, Daniel DeLessert
  • Publication number: 20090151993
    Abstract: A shielded cable interface module having cable receiving grooves extending laterally to an edge of the board, each including a center conductor groove, an insulator groove, and a shield groove. A center conductor via and a shield via extend through the board. A conductor plane on the cable termination side surrounds the cable receiving grooves. The conductor plane includes a non-conductor region within the conductor plane adjacent to each of the conductor center conductor grooves. Ground vias associated with the cable receiving grooves are spaced apart from and partially surround the center conductor via outside and adjacent to the non-conductor region, the ground vias extend through the printed circuit board from the cable termination side to the system interface side.
    Type: Application
    Filed: December 21, 2007
    Publication date: June 18, 2009
    Inventors: Roya Yaghmai, Frank B. Parrish, Steven Hauptman
  • Publication number: 20070007034
    Abstract: In one embodiment, a laminated printed circuit board translator is provided. In some embodiments, the translator includes a receiving board adapted to receive a pin, the receiving board includes a plated via extending through the receiving board and has a hole for receiving a pin. An interface board laminated with the receiving board has a controlled depth via extending through it to contact a conductive trace. The conductive trace extends between the receiving board and the interface board to connect the plated via of the receiving board with the controlled depth via of the interface board. The controlled depth via is configured so that it is capable of being plated through a single sided drilled opening in the interface board. Some embodiments have a pad on the interface board connected to the controlled depth via.
    Type: Application
    Filed: June 26, 2006
    Publication date: January 11, 2007
    Inventors: Arash Behziz, Roya Yaghmai