Abstract: A technique is disclosed for distinguishing parasitic cell failures from other type failures of cells in a memory array. A parasitic failure is defined as one action between cells "k" and "j" such that writing into cell "j" causes a change in cell "k" without intentionally writing into cell "k."A binary pattern generator, produces array test patterns equivalent to a Hamming single error correction code. Each of the patterns is associated with a syndrome bit position and is used to test each array address in turn. Each pattern is read back out by array address and the results are stored in a separate memory for storing the failing syndromes for each failing cell array address. For each cell failure, the syndrome bits form an "address" which is exclusive ORed with the address of the failed cell to yield the address of the root cell causing coupling (parasitic) failure of the failed cell.