Abstract: A digital-to-analog converter comprises a sigma-delta modulator for generating a 1-bit digital signal (D3) modulated synchronously with a clock signal (NF.sub.S) in response to a digital input signal (D2). This modulator is followed by an asynchronous analog sigma-delta modulator for generating a bivalent asynchronously modulated signal (D4) in response to the synchronously modulated digital signal (D3). The information in the digital signal (D3) from the sigma-delta modulator resides in signal transitions which can appear exclusively at discrete instants defined by the clock signal. The information in the asynchronously modulated signal (D4) from the asynchronous sigma-delta modulator is contained in an analog variation of the duty cycle. This means that the signal transitions of the asynchronously modulated signal (D4) are not tied to a fixed pattern of discrete instants but that all the intervening instants are also available.