Patents by Inventor Ruben B. Montez
Ruben B. Montez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10427929Abstract: A cap wafer bonded to a device wafer by a metal polysilicon germanium material to form a sealed chamber around a semiconductor device is provided. On the cap wafer, a stack of silicon (Si), polycrystalline silicon germanium (SiGe), and polycrystalline germanium (Ge) is formed. This stack of material layers is formed to intentionally have a roughened germanium surface. A metal structure is formed on a second wafer, having an anti-stiction coating layer on the surface of the metal structure. A metal silicon germanium bonding material is formed by placing the metal structure and germanium structure in contact and applying heat and pressure. The roughened germanium layer penetrates the anti-stiction coating layer upon application of the pressure. The germanium that penetrates to the metal is free of interfacial anti-stiction coating and allows for eutectic bond formation upon application of heat.Type: GrantFiled: August 3, 2018Date of Patent: October 1, 2019Assignee: NXP USA, Inc.Inventors: Ruben B. Montez, Colin Bryant Stevens
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Patent number: 9988260Abstract: A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then oxidizing the material to form an oxide layer with a rough surface. Another layer is formed over the oxide layer with the rough surface, wherein the roughness of the oxide layer is transferred to the another layer.Type: GrantFiled: April 29, 2016Date of Patent: June 5, 2018Assignee: NXP USA, Inc.Inventors: Ruben B. Montez, Arvind S. Salian, Robert F. Steimle
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Patent number: 9960081Abstract: A method for selective etching using a dry film photoresist includes forming an opening through a substrate from a first surface to expose a stop layer at a second surface of the substrate. A material layer is formed over an inner surface of the opening and over the stop layer. The dry film photoresist is applied over the first surface of the substrate and over the opening. A second photoresist is applied on the dry film photoresist. First and second aligned holes are formed in the second photoresist and the dry film photoresist, respectively. The holes are approximately centered over the opening and are smaller in diameter than the opening so that a composite structure of the dry film photoresist and the second photoresist overhangs edges of the opening. The material layer is removed from the stop layer by etching via the first and second holes.Type: GrantFiled: February 2, 2017Date of Patent: May 1, 2018Assignee: NXP USA, Inc.Inventors: Colin Bryant Stevens, Lianjun Liu, Ruben B. Montez
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Publication number: 20170313573Abstract: A surface of a cavity of a MEMS device that is rough to reduce stiction. In some embodiments, the average roughness (Ra) of the surface is 5 nm or greater. In some embodiments, the rough surface is formed by forming one or more layers of a rough oxidizable material, then oxidizing the material to form an oxide layer with a rough surface. Another layer is formed over the oxide layer with the rough surface, wherein the roughness of the oxide layer is transferred to the another layer.Type: ApplicationFiled: April 29, 2016Publication date: November 2, 2017Inventors: RUBEN B. MONTEZ, ARVIND S. SALIAN, ROBERT F. STEIMLE
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Patent number: 9776853Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: February 23, 2016Date of Patent: October 3, 2017Assignee: NXP USA, Inc.Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9663356Abstract: A method of making a microelectromechanical systems (MEMS) device includes etching away a sacrificial material layer to release a mechanical element of the MEMS device. The MEMS device is formed at least partially on the sacrificial material layer, and the etching leaves a residue in proximity to the mechanical element. The residue is exposed to an anhydrous solution to remove the residue. The residue may be an ammonium fluorosilicate-based residue, and the anhydrous solution may include acetic acid, isopropyl alcohol, acetone, or any anhydrous solution that can effectively dissolve the ammonium fluorosilicate-based residue.Type: GrantFiled: June 18, 2014Date of Patent: May 30, 2017Assignee: NXP USA, Inc.Inventors: Srivatsa G. Kundalgurki, Ruben B. Montez, Gary Pfeffer
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Patent number: 9637372Abstract: A multi-wafer structure is formed by forming a cavity in a cap wafer and forming a first seal material around the cavity. A collapsible standoff structure is formed around the cavity. A movable mass is formed in a device wafer. A second seal material is formed around the movable mass. The first seal material and the second seal material are of materials that are able to form a eutectic bond at a eutectic temperature. The cap wafer and the device wafer are arranged so that the first and second seals are aligned but separated by the collapsible standoff structure. Gas is evacuated from the cavity at a temperature above the eutectic temperature using a low pressure. The temperature is lowered, the cap and device wafer are pressed together, and the temperature is raised above the eutectic temperature to form a eutectic bond with the first and second seal materials.Type: GrantFiled: April 27, 2015Date of Patent: May 2, 2017Assignee: NXP USA, INC.Inventors: Robert F. Steimle, Aaron A. Geisberger, Jeffrey D. Hanna, Ruben B. Montez
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Patent number: 9550664Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces, such as a travel stop and travel stop region, that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of the travel stop region. This is achieved by depositing a polysilicon layer over a dielectric layer using gaseous hydrochloric acid as one of the reactants. A subsequent etch back is performed to further increase the roughness. The deposition of polysilicon and subsequent etch back may be repeated one or more times in order to obtain the desired roughness. A final polysilicon layer may then be deposited to achieve a desired thickness. This final polysilicon layer is patterned to form the travel stop regions. The rougher surface decreases the surface area available for contact and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: December 18, 2014Date of Patent: January 24, 2017Assignee: NXP USA, INC.Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160311676Abstract: A multi-wafer structure is formed by forming a cavity in a cap wafer and forming a first seal material around the cavity. A collapsible standoff structure is formed around the cavity. A movable mass is formed in a device wafer. A second seal material is formed around the movable mass. The first seal material and the second seal material are of materials that are able to form a eutectic bond at a eutectic temperature. The cap wafer and the device wafer are arranged so that the first and second seals are aligned but separated by the collapsible standoff structure. Gas is evacuated from the cavity at a temperature above the eutectic temperature using a low pressure. The temperature is lowered, the cap and device wafer are pressed together, and the temperature is raised above the eutectic temperature to form a eutectic bond with the first and second seal materials.Type: ApplicationFiled: April 27, 2015Publication date: October 27, 2016Inventors: Robert F. STEIMLE, Aaron A. GEISBERGER, Jeffrey D. HANNA, Ruben B. MONTEZ
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Patent number: 9463973Abstract: A mechanism for reducing stiction in a MEMS device by decreasing an amount of carbon from TEOS-based silicon oxide films that can accumulate on polysilicon surfaces during fabrication is provided. A carbon barrier material film is deposited between one or more polysilicon layer in a MEMS device and the TEOS-based silicon oxide layer. This barrier material blocks diffusion of carbon into the polysilicon, thereby reducing accumulation of carbon on the polysilicon surfaces. By reducing the accumulation of carbon, the opportunity for stiction due to the presence of the carbon is similarly reduced.Type: GrantFiled: October 31, 2014Date of Patent: October 11, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Ruben B. Montez, Robert F. Steimle
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Patent number: 9458008Abstract: A microelectromechanical systems (MEMS) die includes a substrate having a first substrate layer, a second substrate layer, and an insulator layer interposed between the first and second substrate layers. A structure is formed in the first substrate layer and includes a platform upon which a MEMS device resides. Fabrication methodology entails forming the MEMS device on a front side of the first substrate layer of the substrate, forming openings extending through the second substrate layer from a back side of the second substrate layer to the insulator layer, and forming a trench in the first substrate layer extending from the front side to the insulator layer. The trench is laterally offset from the openings. The trench surrounds the MEMS device to produce the structure in the first substrate layer on which the MEMS device resides. The insulator layer is removed underlying the structure to suspend the structure.Type: GrantFiled: March 16, 2015Date of Patent: October 4, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Chad S. Dawson, Fengyuan Li, Ruben B. Montez, Colin B. Stevens
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Patent number: 9458010Abstract: A method of making a semiconductor device forms anchors for one or more layers of material. The method includes depositing a first layer of material on a substrate, applying a mask over the first layer of material to mask nanoparticle-sized areas of the first material, removing portions of the first layer of material to form a first set of recesses around the nanoparticle-sized areas of the first material, depositing a second layer of material in the recesses and over the nanoparticle-sized areas so that a second set of recesses is formed in a top surface of the second layer of material, and forming a component of the semiconductor device over the second layer of material. Material of a bottom surface of the component is included in the second set of recesses.Type: GrantFiled: July 22, 2015Date of Patent: October 4, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160272482Abstract: A microelectromechanical systems (MEMS) die includes a substrate having a first substrate layer, a second substrate layer, and an insulator layer interposed between the first and second substrate layers. A structure is formed in the first substrate layer and includes a platform upon which a MEMS device resides. Fabrication methodology entails forming the MEMS device on a front side of the first substrate layer of the substrate, forming openings extending through the second substrate layer from a back side of the second substrate layer to the insulator layer, and forming a trench in the first substrate layer extending from the front side to the insulator layer. The trench is laterally offset from the openings. The trench surrounds the MEMS device to produce the structure in the first substrate layer on which the MEMS device resides. The insulator layer is removed underlying the structure to suspend the structure.Type: ApplicationFiled: March 16, 2015Publication date: September 22, 2016Inventors: CHAD S. DAWSON, FENGYUAN LI, RUBEN B. MONTEZ, COLIN B. STEVENS
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Patent number: 9434602Abstract: Certain microelectromechanical systems (MEMS) devices, and methods of creating them, are disclosed. The method may include forming a structural layer over a substrate; forming a mask layer over the structural layer, wherein the mask layer is formed with a material selective to an etching process; forming a plurality of nanoclusters on the mask layer; and etching the structural layer using at least the etching process.Type: GrantFiled: July 30, 2014Date of Patent: September 6, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9425115Abstract: A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate overlying the support substrate and the device, a glass frit bond ring between the support substrate and the cap substrate, an electrically conductive ring between the support substrate and the cap substrate. The electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer bond ring around the semiconductor device.Type: GrantFiled: December 12, 2013Date of Patent: August 23, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160218045Abstract: A bonded semiconductor device comprising a support substrate, a semiconductor device located with respect to one side of the support substrate, a cap substrate overlying the support substrate and the device, a glass frit bond ring between the support substrate and the cap substrate, an electrically conductive ring between the support substrate and the cap substrate. The electrically conductive ring forms an inner ring around the semiconductor device and the glass frit bond ring forms an outer bond ring around the semiconductor device.Type: ApplicationFiled: December 12, 2013Publication date: July 28, 2016Applicant: FREESCALE SEMICONDUCTOR, INC.Inventors: RUBEN B. MONTEZ, ROBERT F. STEIMLE
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Publication number: 20160176707Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces, such as a travel stop and travel stop region, that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of the travel stop region. This is achieved by depositing a polysilicon layer over a dielectric layer using gaseous hydrochloric acid as one of the reactants. A subsequent etch back is performed to further increase the roughness. The deposition of polysilicon and subsequent etch back may be repeated one or more times in order to obtain the desired roughness. A final polysilicon layer may then be deposited to achieve a desired thickness. This final polysilicon layer is patterned to form the travel stop regions. The rougher surface decreases the surface area available for contact and, in turn, decreases the area through which stiction can be imparted.Type: ApplicationFiled: December 18, 2014Publication date: June 23, 2016Inventors: Ruben B. Montez, Robert F. Steimle
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Publication number: 20160167944Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: ApplicationFiled: February 23, 2016Publication date: June 16, 2016Inventors: Robert F. Steimle, Ruben B. Montez
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Patent number: 9318376Abstract: A front-end-of-line through-substrate via is provided for application in certain semiconductor device fabrication, including microelectromechanical (MEMS) devices. The through-substrate via (TSV) has a conductive element formed from the cylindrical core of a ring-shaped isolating etch trench. The conductivity of the core is provided by in-diffusion of dopants from a highly-doped layer deposited along sidewalls of the core within the etched trench. The highly-doped layer used as the diffusion source can be either conductive or insulating, depending upon the application. The highly-doped diffusion source layer can be retained after diffusion to further contribute to the conductivity of the TSV, to help fill or seal the via, or can be partially or completely removed. Embodiments provide for the drive in-diffusion process to use a same heating step as that used for thermal oxidation to fill or seal the via trench. Other embodiments can provide for diffusion elements from a gaseous source.Type: GrantFiled: December 15, 2014Date of Patent: April 19, 2016Assignee: FREESCALE SEMICONDUCTOR, INC.Inventors: Paige M Holm, Lianjun Liu, Ruben B. Montez
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Patent number: 9290380Abstract: A mechanism for reducing stiction in a MEMS device by decreasing surface area between two surfaces that can come into close contact is provided. Reduction in contact surface area is achieved by increasing surface roughness of one or both of the surfaces. The increased roughness is provided by forming a micro-masking layer on a sacrificial layer used in formation of the MEMS device, and then etching the surface of the sacrificial layer. The micro-masking layer can be formed using nanoclusters. When a next portion of the MEMS device is formed on the sacrificial layer, this portion will take on the roughness characteristics imparted on the sacrificial layer by the etch process. The rougher surface decreases the surface area available for contact in the MEMS device and, in turn, decreases the area through which stiction can be imparted.Type: GrantFiled: December 18, 2012Date of Patent: March 22, 2016Assignee: Freescale Semiconductor, Inc.Inventors: Robert F. Steimle, Ruben B. Montez