Abstract: Key capability storage circuitry 90 is provided to store a key capability specifying key bounds indicating information indicative of permissible bounds for information specified by any one or more of: a non-capability operand, a capability, or the key capability itself. For a given software compartment executed by the processing circuitry, which lacks a key capability operating privilege associated with at least a portion of the key capability storage circuitry, the processing circuitry is configured to prohibit certain manipulations of the key capability, including a transfer between key capability storage and a memory location selected by the given software compartment. This can help to support temporal safety.

Abstract: An apparatus and method are provided for controlling memory accesses. The apparatus has memory access circuitry for performing a tag-guarded memory access operation in response to a target address, the tag-guarded memory access operation by default comprising: comparing an address tag associated with the target address with a guard tag stored in a memory system in association with a block of one or more memory locations comprising an addressed location identified by the target address; and generating an indication of whether a match is detected between the guard tag and the address tag. Further, the apparatus has control tag storage for storing, for each of a plurality of memory regions, configuration control information used to control how the tag-guarded memory access operation is performed by the memory access circuitry when the target address is within that memory region. Each memory region corresponds to multiple of the blocks.

Abstract: Memory allocation circuitry allocate a memory region in memory, and bounded pointer generation circuitry generates bounded pointers including a revocable bounded pointer that provides a pointer value and range information identifying an address range of the memory region. The memory allocation circuitry provides, at a header location in the memory, a header for the memory region with a first token field which is initialized to a first token value associated with the memory region. The memory allocation circuitry is responsive to the deallocation of the memory region to modify the stored value in the first token field of the header. In response to a request to generate a memory address using the revocable bounded pointer, a use authentication check prevents generation of the memory address when it is determined that the stored value in the first token field has been changed.

Abstract: An apparatus and method are provided for controlling memory accesses. The apparatus has memory access circuitry for performing a tag-guarded memory access operation in response to a target address, the tag-guarded memory access operation by default comprising: comparing an address tag associated with the target address with a guard tag stored in a memory system in association with a block of one or more memory locations comprising an addressed location identified by the target address; and generating an indication of whether a match is detected between the guard tag and the address tag. Further, the apparatus has control tag storage for storing, for each of a plurality of memory regions, configuration control information used to control how the tag-guarded memory access operation is performed by the memory access circuitry when the target address is within that memory region. Each memory region corresponds to multiple of the blocks.

Abstract: An apparatus and method are provided for controlling use of bounded pointers. The apparatus has memory allocation circuitry for allocating a memory region in memory, and bounded pointer generation circuitry for generating bounded pointers, those bounded pointers including at least a revocable bounded pointer for use in accessing the memory region. The revocable bounded pointer provides a pointer value and range information identifying an address range of the memory region. The memory allocation circuitry is arranged to provide, at a header location in the memory, a header for the memory region, the header having a first token field which is initialised to a first token value associated with the memory region. The header location is derivable from the range information provided by the revocable bounded pointer. The memory allocation circuitry is responsive to the deallocation of the memory region to modify the stored value in the first token field of the header.