Patents by Inventor Rudi Frenzel
Rudi Frenzel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9749008Abstract: Vectored communication devices and methods are provided for communication via a plurality of communication connections. Communication on at least some of the communication connections is switchable between a low power mode and a regular mode.Type: GrantFiled: May 31, 2011Date of Patent: August 29, 2017Assignee: Lantiq Beteiligungs-GmbH & Co. KGInventors: Rudi Frenzel, Axel Clausen, Heinrich Schenk
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Patent number: 9001904Abstract: At least one implementation generates at least one time-domain sample in a multicarrier apparatus, and links a first timestamp to the at least one time-domain sample. The at least one time-domain sample may be associated with a Discrete Multi-Tone (DMT) symbol and transmitted to a receiving multicarrier apparatus. The receiving multicarrier apparatus may generate a second timestamp upon receiving the at least one time-domain sample.Type: GrantFiled: April 14, 2010Date of Patent: April 7, 2015Assignee: Lantiq Deutschland GmbHInventor: Rudi Frenzel
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Patent number: 8761284Abstract: Described herein are systems, apparatuses, and methods relating to a power-saving state or power-saving mode to facilitate clock synchronization between the two transceiver units and/or updating of DSL operation parameters during the power-saving state.Type: GrantFiled: November 26, 2012Date of Patent: June 24, 2014Assignee: Lantiq Deutschland GmbHInventors: Roland Zukunft, Rudi Frenzel
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Publication number: 20130329816Abstract: Embodiments related to a power-saving state in DSL systems and devices are described and depicted.Type: ApplicationFiled: November 26, 2012Publication date: December 12, 2013Applicant: LANTIQ DEUTSCHLAND GMBHInventors: Roland ZUKUNFT, Rudi FRENZEL
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Patent number: 8320435Abstract: Described herein are systems, apparatuses, and methods relating to a power-saving state or power-saving mode to facilitate clock synchronization between the two transceiver units and/or updating of DSL operation parameters during the power-saving state.Type: GrantFiled: September 28, 2007Date of Patent: November 27, 2012Assignee: Lantiq Deutschland GmbHInventors: Roland Zukunft, Rudi Frenzel
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Patent number: 8169963Abstract: Allocation of different signal-to-noise margins to different carriers in a multi-carrier system is described. A preferred embodiment comprises assigning signal-to-noise ratio (SNR) margins to carriers in a multi-carrier system, comprises assigning a first SNR margin to a first data service based upon a first service characteristic, assigning a second SNR margin to a second data service based upon a second service characteristic, transmitting data associated with the first data service using the first signal-to-noise margin, and transmitting data associated with the second data service using the second signal-to-noise margin.Type: GrantFiled: August 20, 2010Date of Patent: May 1, 2012Assignee: Lantiq Deutschland GmbHInventors: Umashankar Thyagarajan, Rudi Frenzel, Bernd Heise, Axel Clausen
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Publication number: 20120026926Abstract: Vectored communication devices and methods are provided for communication via a plurality of communication connections. Communication on at least some of the communication connections is switchable between a low power mode and a regular mode.Type: ApplicationFiled: May 31, 2011Publication date: February 2, 2012Inventors: Rudi FRENZEL, Axel CLAUSEN, Heinrich SCHENK
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Publication number: 20110216816Abstract: At least one implementation generates at least one time-domain sample in a multicarrier apparatus, and links a first timestamp to the at least one time-domain sample. The at least one time-domain sample may be associated with a Discrete Multi-Tone (DMT) symbol and transmitted to a receiving multicarrier apparatus. The receiving multicarrier apparatus may generate a second timestamp upon receiving the at least one time-domain sample.Type: ApplicationFiled: April 14, 2010Publication date: September 8, 2011Inventor: Rudi FRENZEL
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Patent number: 7860155Abstract: A data transmission device for transmitting data between a subscriber line and a local line-connected data transmission network is described.Type: GrantFiled: April 12, 2007Date of Patent: December 28, 2010Assignee: Lantiq Deutschland GmbHInventors: Rudi Frenzel, Friedrich Geissler, Ulrich Huewels
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Publication number: 20090086798Abstract: Embodiments related to a power-saving state in DSL systems and devices are described and depicted.Type: ApplicationFiled: September 28, 2007Publication date: April 2, 2009Applicant: INFINEON TECHNOLOGIES AGInventors: Roland Zukunft, Rudi Frenzel
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Publication number: 20080285510Abstract: Allocation of different signal-to-noise margins to different carriers in a multi-carrier system is described. A preferred embodiment comprises assigning signal-to-noise ratio (SNR) margins to carriers in a multi-carrier system, comprises assigning a first SNR margin to a first data service based upon a first service characteristic, assigning a second SNR margin to a second data service based upon a second service characteristic, transmitting data associated with the first data service using the first signal-to-noise margin, and transmitting data associated with the second data service using the second signal-to-noise margin.Type: ApplicationFiled: May 15, 2007Publication date: November 20, 2008Inventors: Umashankar Thyagarajan, Rudi Frenzel, Bernd Heise, Axel Clausen
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Patent number: 7352776Abstract: The invention relates to a line terminating device for a subscriber line which transmits and receives broadband signals via a single subscriber line, a broadband signal being composed of a broadband or narrowband audio-frequency data signal and a broadband higher-frequency data signal and the frequency bands of the voice signal and of the data signal essentially not overlapping. The line terminating device according to the invention has a digital frequency separating filter in the digital section of the line terminating device, which is arranged in the digital section of the line terminating device so that the audio-frequency voice signal is separated from the higher-frequency data signal. In particular, the line terminating device is suitable for separating an ISDN or POTS voice signal from an ADSL data signal.Type: GrantFiled: September 30, 1999Date of Patent: April 1, 2008Assignee: Infineon Technologies, AGInventors: Joerg Hauptmann, Paul Kunisch, Hans Werner Rudolf, Gerald Krottendorfer, Manfred Preitnegger, Rudi Frenzel, Markus Terschluse, Dirk Schmuecking
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Patent number: 7346746Abstract: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. A bank may be further divided into a plurality of blocks. A cache is provided to enable a processor to fetch from memory a plurality of data words from different memory banks to reduce memory latency caused by memory contention.Type: GrantFiled: April 26, 2002Date of Patent: March 18, 2008Assignee: Infineon Technologies AktiengesellschaftInventors: Raj Kumar Jain, Rudi Frenzel
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Publication number: 20080008232Abstract: A data transmission device for transmitting data between a subscriber line and a local line-connected data transmission network is described.Type: ApplicationFiled: April 12, 2007Publication date: January 10, 2008Inventors: Rudi Frenzel, Friedrich Geissler, Ulrich Huewels
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Publication number: 20060059319Abstract: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes to be stored in alternate banks. Each bank may be further divided into a plurality of blocks. By staggering or synchronizing the processors to execute the computer program such that each processor access a different block during the same cycle, the processors can access the memory simultaneously. Additionally, a cache is provided to enable a processor to fetch from memory a plurality of data words from different memory banks to reduce memory latency caused by memory contention.Type: ApplicationFiled: April 4, 2003Publication date: March 16, 2006Inventors: Rudi Frenzel, Christian Horak, Markus Terschluse, Stefan Uhlemann, Raj Jain
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Publication number: 20050071574Abstract: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes to be stored in alternate banks. Each bank may be further divided into a plurality of blocks. By staggering or synchronizing the processors to execute the computer program such that each processor access a different block during the same cycle, the processors can access the memory simultaneously.Type: ApplicationFiled: November 6, 2002Publication date: March 31, 2005Inventors: Rudi Frenzel, Christain Horak, Raj Jain, Markus Terschluse, Stefan Uhlemann
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Publication number: 20040120359Abstract: Digital real-time data processing system which processes digital input data streams received from a plurality of digital data sources (4) to produce digital output data streams and sends them to digital data sinks (32), the digital data processing system (1) having:Type: ApplicationFiled: January 30, 2004Publication date: June 24, 2004Inventors: Rudi Frenzel, Wolfgang Glatt, Jain Raj Kumar, Markus Terschluse, Stefan Uhlemann
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Publication number: 20030204665Abstract: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. A bank may be further divided into a plurality of blocks. A cache is provided to enable a processor to fetch from memory a plurality of data words from different memory banks to reduce memory latency caused by memory contention.Type: ApplicationFiled: April 26, 2002Publication date: October 30, 2003Inventors: Raj Kumar Jain, Rudi Frenzel
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Publication number: 20030088744Abstract: A system with multiple processors sharing a single memory module without noticeable performance degradation is described. The memory module is divided into n independently addressable banks, where n is at least 2 and mapped such that sequential addresses are rotated between the banks. Such a mapping causes sequential data bytes to be stored in alternate banks. Each bank may be further divided into a plurality of blocks. By staggering or synchronizing the processors to execute the computer program such that each processor access a different block during the same cycle, the processors can access the memory simultaneously.Type: ApplicationFiled: April 4, 2002Publication date: May 8, 2003Applicant: Infineon Technologies AktiengesellschaftInventors: Raj Kumar Jain, Rudi Frenzel, Markus Terschluse, Christian Horak, Stefan Uhlemann
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Patent number: 5524149Abstract: In an adaptive filter a frequency domain filter is used to enhance the convergence properties of the filter for strongly correlated signals.To reduce the amount of delay in the filter the impulse response of said filter for small values of time is generated by a time domain filter, and said impulse response for larger values of time is generated by a frequency domain filter.Type: GrantFiled: August 18, 1994Date of Patent: June 4, 1996Assignee: U.S. Philips CorporationInventor: Rudi Frenzel