Abstract: In a broadband signal space switching device, the respective switching elements are controllable by a decoder-controlled, crosspoint-associated memory cell and are respectively formed with a CMOS inverter circuit having MOS transistors of the enhancement type which lie between a switching element input and a switching element output. A further p-channel transistor, likewise of the enhancement type, is inserted between the p-channel enhancement transistor and the appertaining feed voltage source and a further n-channel transistor, likewise of the enhancement type, is inserted between the n-channel enhancement transistor and the appertaining feed voltage source. The control electrodes of the further enhancement transistors are connected to the outputs of the memory cell.

Abstract: A semiconductor memory has storage cells composed of MOS selector transistors operated by a drive line and storage capacitors connected to selector transistors. The selector transistors are constructed in accordance with the V-MOS technique. A semiconductor substrate is highly doped with atoms of one conductivity type and carries a buried layer highly doped with atoms of the opposite conductivity type. An epitaxial layer, weakly doped with atoms of the one conductivity type is carried over the buried layer and the semiconductor substrate. A second layer, highly doped with atoms of the opposite conductivity type, is carried over the epitaxial layer above the buried layer. A V-shaped groove divides the second layer into two sub-portions in the region of the storage cells and extends into the buried layer and a conductor path is disposed in the groove.

Abstract: A semiconductor store is disclosed comprising a semiconductor substrate of a highly doped semiconductor material of one conductivity type, an epitaxial layer on one surface of said substrate of the same conductivity type and of low doping, a buried layer lying partly in said substrate and partly in said epitaxial layer, said buried layer being of the opposite conductivity type and of high doping, a highly doped second layer of the same conductivity type as said buried layer in the outer surface of said epitaxial layer, a V-shape groove extending through said second layer, said epitaxial layer and said buried layer and penetrating into said substrate, an insulating layer covering said epitaxial layer and the walls of said V-shape groove, and a layer of conductive material covering said insulating layer, whereby a two-cell semiconductor store is provided.