Patents by Inventor Rudiger Kuhn
Rudiger Kuhn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10560112Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.Type: GrantFiled: April 3, 2019Date of Patent: February 11, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Thomas Fuchs, Rudiger Kuhn, Bernhard Wolfgang Ruck
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Publication number: 20190229743Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.Type: ApplicationFiled: April 3, 2019Publication date: July 25, 2019Inventors: Thomas Fuchs, Rudiger Kuhn, Bernhard Wolfgang Ruck
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Patent number: 10298250Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.Type: GrantFiled: April 10, 2017Date of Patent: May 21, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Thomas Fuchs, Rudiger Kuhn, Bernhard Wolfgang Ruck
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Patent number: 10126792Abstract: A power conversion system includes a maximum load current controller that is operable to limit a load current. For example, in a power conversion system operating in a discontinuous conduction mode (DCM), the maximum load current controller limits the load current by determining an idle period in an active cycle for power switches of the maximum load current controller. The maximum load current controller is optionally operable to approximate values for the time idle period that are substantially equal to theoretically calculated values.Type: GrantFiled: December 1, 2015Date of Patent: November 13, 2018Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Francesco Silvio Santoro, Ralf Peter Brederlow, Neil Gibson, Rüdiger Kuhn
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Publication number: 20170250699Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.Type: ApplicationFiled: April 10, 2017Publication date: August 31, 2017Inventors: Thomas Fuchs, Rudiger Kuhn, Bernhard Wolfgang Ruck
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Patent number: 9654131Abstract: An analog-to-digital converter (ADC) includes a digital-to-analog converter (DAC) that has a configurable capacitor array. Based on measurements of differential nonlinearity (DNL) and/or integral nonlinearity (INL) error by an external test computer system, an order for use of the DAC's capacitors can be determined so as to reduce DNL error aggregation, also called INL. The DAC includes a switch matrix that can be programmed by programming data supplied by the test computer system.Type: GrantFiled: February 26, 2016Date of Patent: May 16, 2017Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Thomas Fuchs, Rüdiger Kuhn, Bernhard Wolfgang Ruck
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Publication number: 20170126124Abstract: A power conversion system includes a maximum load current controller that is operable to limit a load current. For example, in a power conversion system operating in a discontinuous conduction mode (DCM), the maximum load current controller limits the load current by determining an idle period in an active cycle for power switches of the maximum load current controller. The maximum load current controller is optionally operable to approximate values for the time idle period that are substantially equal to theoretically calculated values.Type: ApplicationFiled: December 1, 2015Publication date: May 4, 2017Applicant: Texas Instruments Deutschland GmbHInventors: Francesco Silvio Santoro, Ralf Peter Brederlow, Neil Gibson, Rüdiger Kuhn
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Patent number: 9541989Abstract: A power conversion system includes a power transfer estimator that is operable to provide a determination of the cumulative amount of power transferred through the power supply, without additional sensing elements and at extremely low power levels, and to provide such determinations periodically over potentially long periods of time commensurate with the lifetime of a limited power source such as a battery. In a power conversion system operating in a discontinuous conduction mode (DCM), the power transfer estimator determines the charge transferred during each switching cycle, and the total number of switching cycles, to calculate the cumulative amount of power transferred. The power transfer estimator is optionally operable to calculate a value for the inductance to be used in the determination of the cumulative amount of power transferred through the power supply.Type: GrantFiled: November 17, 2014Date of Patent: January 10, 2017Assignee: TEXAS INSTRUMENTS DEUTSCHLAND GMBHInventors: Francesco Silvio Santoro, Ralf Peter Brederlow, Niel Gibson, Rüdiger Kuhn
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Publication number: 20160139650Abstract: A power conversion system includes a power transfer estimator that is operable to provide a determination of the cumulative amount of power transferred through the power supply, without additional sensing elements and at extremely low power levels, and to provide such determinations periodically over potentially long periods of time commensurate with the lifetime of a limited power source such as a battery. In a power conversion system operating in a discontinuous conduction mode (DCM), the power transfer estimator determines the charge transferred during each switching cycle, and the total number of switching cycles, to calculate the cumulative amount of power transferred. The power transfer estimator is optionally operable to calculate a value for the inductance to be used in the determination of the cumulative amount of power transferred through the power supply.Type: ApplicationFiled: November 17, 2014Publication date: May 19, 2016Inventors: Francesco Silvio Santoro, Ralf Peter Brederlow, Niel Gibson, Rüdiger Kuhn
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Patent number: 8750015Abstract: An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor which is then disconnected from the integrated circuit power supply. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged and disconnected from the power supply. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.Type: GrantFiled: February 11, 2011Date of Patent: June 10, 2014Assignee: Texas Instruments IncorporatedInventors: Volker Rzehak, Rudiger Kuhn, Johannes Gerber, Matthias Arnold
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Publication number: 20130114324Abstract: An electronic device includes an integrated circuit with a FRAM memory and an integrated capacitor connected between a power supply for the FRAM memory and ground. The integrated capacitor has a capacitance sufficient to store the charge necessary for a complete read-and-write-back cycle of the FRAM memory. When granting read-access to the FRAM memory, the FRAM memory is supplied by the integrated capacitor. Upon receiving a request for a read-access to the FRAM memory, a charge detector detects whether the internal capacitor is sufficiently charged for a complete read-and-write-back cycle of the FRAM memory. Read-access to the FRAM memory is only granted if the internal capacitor is sufficiently charged. An alternative embodiment alternately charges and powers the FRAM from two integrated capacitors.Type: ApplicationFiled: February 11, 2011Publication date: May 9, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Volker Rzehak, Rudiger Kuhn, Johannes Gerber, Matthias Arnold
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Patent number: 8390333Abstract: The invention relates to an electronic device which comprises a comparator coupled to monitor a first supply voltage level at a first supply voltage node. The comparator comprises a differential input transistor stage having one input coupled to the first supply voltage node and the other input coupled to receive a reference voltage level, a first current source configured to supply a current of a first magnitude, a second current source configured to supply a current of a second magnitude, and a capacitor. The first magnitude is greater than the second magnitude and the first current source is coupled with one side to the differential input stage for supplying the differential input stage and with the other side to a first node. The second current source is coupled with one side to the first node and with the other side to a second supply voltage node having a second supply voltage level and the capacitor is coupled with one side to the first node and with the other side to the first supply voltage node.Type: GrantFiled: August 8, 2011Date of Patent: March 5, 2013Assignee: Texas Instruments IncorporatedInventors: Rüdiger Kuhn, Ivanov Vadim V. Vadim Ivanov, Frank Dornseifer, Michael Zwerg
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Publication number: 20120062279Abstract: The invention relates to an electronic device which comprises a comparator coupled to monitor a first supply voltage level at a first supply voltage node. The comparator comprises a differential input transistor stage having one input coupled to the first supply voltage node and the other input coupled to receive a reference voltage level, a first current source configured to supply a current of a first magnitude, a second current source configured to supply a current of a second magnitude, and a capacitor. The first magnitude is greater than the second magnitude and the first current source is coupled with one side to the differential input stage for supplying the differential input stage and with the other side to a first node. The second current source is coupled with one side to the first node and with the other side to a second supply voltage node having a second supply voltage level and the capacitor is coupled with one side to the first node and with the other side to the first supply voltage node.Type: ApplicationFiled: August 8, 2011Publication date: March 15, 2012Applicant: Texas Instruments Deutschland GMBHInventors: Rüdiger Kuhn, Ivanov Vadim, Frank Dornseifer, Michael Zwerg
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Publication number: 20120062197Abstract: The invention relates to an electronic device which comprises a voltage regulator for providing a regulated output voltage to an electronic circuit and a control stage coupled to control the voltage regulator. The control stage is further configured to detect a request for a change of a system configuration of the electronic circuit coupled to receive the output voltage of the voltage regulator, to determine an activity factor of the electronic circuit for the requested system configuration, to determine a system clock frequency of a system clock of the electronic circuit, to determine a required current drive level of the voltage regulator based on the activity factor, the system clock frequency or the product of both, and to adjust the current drive level of the voltage regulator to the requested current drive level.Type: ApplicationFiled: July 11, 2011Publication date: March 15, 2012Inventors: Michael Lüders, Ralf Brederlow, Rüdiger Kuhn