Abstract: A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.

Abstract: A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; and polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval.

Abstract: A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.

Abstract: A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; and polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval.

Abstract: A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval; and dicing the semiconductor wafer to separate the plurality of semiconductor devices from each other without additional polishing of the backside of the semiconductor wafer before dicing the semiconductor wafer.

Abstract: A method for forming semiconductor devices includes: grinding a backside of a semiconductor wafer with a grinding wheel during a first time interval, wherein the grinding wheel is forward moved during the first time interval, wherein a plurality of semiconductor devices are formed on the semiconductor wafer; polishing the backside of the semiconductor wafer with the grinding wheel in a second time interval, wherein the grinding wheel is backward moved during the second time interval; and dicing the semiconductor wafer to separate the plurality of semiconductor devices from each other without additional polishing of the backside of the semiconductor wafer before dicing the semiconductor wafer.

Abstract: An apparatus for controlling a movement of a grinding wheel of a semiconductor wafer grinding system includes: an interface to obtain a feedback signal including grinding force information indicating a force applied to a semiconductor wafer by the grinding wheel; and a control module to generate a control signal for controlling the movement of the grinding wheel based on the grinding force information. The control module generates the control signal to trigger a forward movement of the grinding wheel according to a desired velocity profile during the grinding, if the grinding force information indicates that a force applied by the grinding wheel is below a force threshold. The control module generates the control signal to trigger a movement of the grinding wheel slower than the desired velocity profile during the grinding, if the grinding force information indicates that the force applied by the grinding wheel is above the force threshold.

Abstract: A method for manufacturing a semiconductor device includes providing a carrier wafer; and forming a semiconductor device layer on the carrier wafer. After front side processing of the semiconductor device layer, the carrier wafer is removed by cutting along a plane which is parallel to the semiconductor device layer.

Abstract: An apparatus for controlling a movement of a grinding wheel of a semiconductor wafer grinding system includes: an interface to obtain a feedback signal including grinding force information indicating a force applied to a semiconductor wafer by the grinding wheel; and a control module to generate a control signal for controlling the movement of the grinding wheel based on the grinding force information. The control module generates the control signal to trigger a forward movement of the grinding wheel according to a desired velocity profile during the grinding, if the grinding force information indicates that a force applied by the grinding wheel is below a force threshold. The control module generates the control signal to trigger a movement of the grinding wheel slower than the desired velocity profile during the grinding, if the grinding force information indicates that the force applied by the grinding wheel is above the force threshold.

Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, at least one electric connection structure mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment, and a mounting provision configured for mounting the electronic device at a periphery device.

Abstract: An electronic device comprising a carrier having a mounting surface, at least one electronic chip mounted on the mounting surface, at least one electric connection structure mounted on the mounting surface, an encapsulant at least partially encapsulating the carrier and the at least one electronic chip, and partially encapsulating the at least one electric connection structure so that part of a surface of the at least one electric connection structure is exposed to an environment, and a mounting provision configured for mounting the electronic device at a periphery device.

Abstract: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 ?m, an overall planarity value GBIR of 5 ?m or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 ?m, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.

Abstract: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 ?m, an overall planarity value GBIR of 5 ?m or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 ?m, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.

Abstract: The invention relates to a radiofrequency power semiconductor module having a cavity housing constructed from three modules, a 1st module, which has an upwardly and downwardly open housing frame with horizontally arranged flat conductors, a 2nd module, which has the chip island as a heat sink with at least one radiofrequency semiconductor component, the 2nd module forming the bottom of the cavity housing, and a 3rd module, which has the housing cover.

Abstract: An apparatus for singulating and bonding semiconductor chips includes a singulating station and a mounting station. In the singulating station, a semiconductor chip is provided with a bonding wire by a bonding tool and lifted off a carrier film. Then, in the mounting station, the semiconductor chip is placed on a chip mounting surface and fixed in place. The bonding wire is guided to a contact-connection surface of the circuit carrier and bonded to this surface.

Abstract: A configuration and method for contacting a circuit is described. A carrier is disposed adjacent a circuit, and a setting element at which an electrical connection formed of a conductive material is disposed, so that the electrical connection connects the circuit to the carrier in a bonding process. In this manner an efficient and cost effective method for connecting the circuit to carrier is performed.

Abstract: Unpolished semiconductor wafers are produced by: (a) pulling a single crystal of a semiconductor material, (b) grinding the single crystal round, (c) separating a semiconductor wafer from this crystal, (d) rounding the edge of the semiconductor wafer, (e) surface-grinding at least one side of the semiconductor wafer, (f) treating the semiconductor wafer with an etchant, and (g) cleaning the semiconductor wafer. The unpolished semiconductor wafers have, on at least the front side, a reflectivity of 95% or more, a surface roughness of 3 nm or less, have a thickness of 80-2500 ?m, an overall planarity value GBIR of 5 ?m or less with an edge exclusion of 3 mm and a photolithographic resolution of at least 0.8 ?m, and which furthermore contain a native oxide layer with a thickness of 0.5-3 nm on both sides.

Abstract: An apparatus for singulating and bonding semiconductor chips includes a singulating station and a mounting station. In the singulating station, a semiconductor chip is provided with a bonding wire by a bonding tool and lifted off a carrier film. Then, in the mounting station, the semiconductor chip is placed on a chip mounting surface and fixed in place. The bonding wire is guided to a contact-connection surface of the circuit carrier and bonded to this surface.

Abstract: A semiconductor component has a housing with a first main area and a second main area opposite to the first main area, which surrounds at least one semiconductor chip. The semiconductor chip has a first metallization layer on a first main side. A second main side of the semiconductor chip borders the second main area of the semiconductor component. The first metallization layer of the semiconductor chip is connected via electrical conductors to contacts that are likewise surrounded by the housing and border the second main area. The semiconductor chip furthermore has, on the second main side, a second metallization layer for carrying signals.

Abstract: The invention relates to a radiofrequency power semiconductor module having a cavity housing constructed from three modules, a 1st module, which has an upwardly and downwardly open housing frame with horizontally arranged flat conductors, a 2nd module, which has the chip island as a heat sink with at least one radiofrequency semiconductor components, the 2nd module forming the bottom of the cavity housing, and a 3rd module, which has the housing cover.