Patents by Inventor Ruey-Bo Sun

Ruey-Bo Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240038690
    Abstract: A semiconductor device includes an electronic device, a guard trace and a first trace. The guard trace is connecting to a ground layer through a first ground via. The first trace is disposed adjacent to the electronic device and the guard trace and includes a first segment. A phase or a direction of a first current signal conducted on the first trace is changed in the first segment. The electronic device and the first trace are disposed at different sides of the guard trace and the first ground via is beside the first segment.
    Type: Application
    Filed: June 19, 2023
    Publication date: February 1, 2024
    Applicant: MEDIATEK INC.
    Inventors: Po-Jui Li, Ruey-Bo Sun, Yen-Ju Lu, Chun-Yuan Yeh, Sheng-Mou Lin
  • Publication number: 20240038443
    Abstract: A semiconductor device includes a substrate; a first terminal and a second terminal; and a conductor arranged on the substrate between the first terminal and the second terminal to constitute an inductor shaped for forming a first loop and a second loop arranged side-by-side along a first direction. A crossing of the conductor with itself is present between the first loop and the second loop. The first loop and the second loop define a first enclosed area and a second enclosed area, respectively. At least one ground bar traverses either the first loop or the second loop.
    Type: Application
    Filed: July 3, 2023
    Publication date: February 1, 2024
    Applicant: MEDIATEK INC.
    Inventors: Hsin-Yu Hung, Ruey-Bo Sun, Sheng-Mou Lin
  • Publication number: 20230253390
    Abstract: A semiconductor package assembly is provided. The semiconductor package assembly includes a base, a first system-on-chip (SOC) die, a conductive routing and a first shielding film. The first SOC die is disposed on the base. The first SOC die has a front surface and a back surface. The first SOC die includes a first inductor close to the front surface. The conductive routing is disposed on the back surface of the first SOC die. The first shielding film is disposed between the first SOC die and the conductive routing. The first shielding film covers the back surface of the first SOC die and fully overlaps the first inductor.
    Type: Application
    Filed: January 13, 2023
    Publication date: August 10, 2023
    Inventors: Ruey-Bo SUN, Chih-Chun HSU, Sheng-Mou LIN
  • Publication number: 20230014046
    Abstract: According to an embodiment of the invention, a semiconductor device comprises a substrate, a semiconductor die and a first shielding structure. The semiconductor die is disposed on the substrate and comprises an electronic device. The first shielding structure is formed outside of the semiconductor die and disposed under the electronic device.
    Type: Application
    Filed: June 24, 2022
    Publication date: January 19, 2023
    Applicant: MEDIATEK INC.
    Inventors: Ruey-Bo Sun, Sheng-Mou Lin
  • Publication number: 20220254868
    Abstract: A semiconductor device includes a substrate; a first terminal and a second terminal; and a conductor arranged on the substrate between the first terminal and the second terminal to constitute an inductor shaped for forming a first loop and a second loop. A first crossing of the conductor with itself is present between the first loop and the second loop. The first loop and the second loop define a first enclosed area and a second enclosed area, respectively. The first enclosed area is smaller than the second enclosed area.
    Type: Application
    Filed: December 7, 2021
    Publication date: August 11, 2022
    Applicant: MEDIATEK INC.
    Inventor: Ruey-Bo Sun
  • Patent number: 10490511
    Abstract: A microelectronic assembly includes a substrate and a first microelectronic component mounted on the substrate. The first microelectronic component includes a digital/analog IP block and a RF IP block. A shielding case is mounted on the substrate. The shielding case includes a plurality of sidewalls, one intermediate wall, and a lid. A thermal interface material (TIM) layer is situated between the lid and the first microelectronic component. A noise suppressing structure is interposed between the TIM layer and the first microelectronic component.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: November 26, 2019
    Assignee: MEDIATEK INC.
    Inventors: Ruey-Bo Sun, Wen-Chou Wu
  • Publication number: 20180350751
    Abstract: A microelectronic assembly includes a substrate and a first microelectronic component mounted on the substrate. The first microelectronic component includes a digital/analog IP block and a RF IP block. A shielding case is mounted on the substrate. The shielding case includes a plurality of sidewalls, one intermediate wall, and a lid. A thermal interface material (TIM) layer is situated between the lid and the first microelectronic component. A noise suppressing structure is interposed between the TIM layer and the first microelectronic component.
    Type: Application
    Filed: May 8, 2018
    Publication date: December 6, 2018
    Inventors: Ruey-Bo Sun, Wen-Chou Wu
  • Patent number: 10068857
    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a substrate, a semiconductor die, a base and a first inductor structure. The substrate has a die-attach surface and a solder-ball-attach surface opposite to the die-attach surface. The semiconductor die is mounted on the die-attach surface of the substrate. The semiconductor die includes a radio-frequency (RF) circuit and a first RF die pad electrically connected to the RF circuit. The base is mounted on the solder-ball-attach surface of the substrate. The first inductor structure is positioned on the substrate, the semiconductor die or the base. The first inductor structure includes a first terminal electrically connected to the first die pad and a second terminal electrically connected to a ground terminal.
    Type: Grant
    Filed: October 26, 2017
    Date of Patent: September 4, 2018
    Assignee: MEDIATEK INC.
    Inventors: Ruey-Bo Sun, Sheng-Mou Lin, Wen-Chou Wu
  • Publication number: 20180122747
    Abstract: The invention provides a semiconductor package assembly. The semiconductor package assembly includes a substrate, a semiconductor die, a base and a first inductor structure. The substrate has a die-attach surface and a solder-ball-attach surface opposite to the die-attach surface. The semiconductor die is mounted on the die-attach surface of the substrate. The semiconductor die includes a radio-frequency (RF) circuit and a first RF die pad electrically connected to the RF circuit. The base is mounted on the solder-ball-attach surface of the substrate. The first inductor structure is positioned on the substrate, the semiconductor die or the base. The first inductor structure includes a first terminal electrically connected to the first die pad and a second terminal electrically connected to a ground terminal.
    Type: Application
    Filed: October 26, 2017
    Publication date: May 3, 2018
    Inventors: Ruey-Bo Sun, Sheng-Mou Lin, Wen-Chou Wu