Abstract: A computer system includes a plurality of central processing units (CPUs), a main memory, a system control unit (SCU) for controlling the transfer of data between the CPUs and the main memory, and a service processing unit (SPU) to interface the computer system with the outside world, such as an operator console. The method used for interfacing the SPU and SCU includes delivering a BUFFER FULL handshaking signal from the SPU to the SCU in response to the SPU receive buffer having data contained therein and being unavailable to receive data. The SCU responds to the absence of the BUFFER FULL handshaking signal by delivering a TRANSMIT FRAME handshaking signal to the SCU. A preselected duration of time after delivering the transmit frame, the SCU delivers the actual data in a series of fourteen consecutive clock cycles.

Abstract: To interface a system control unit with an input/unit in a computer system, an interface includes a transmitter for sequentially transmitting data packets and parity signals between the system control unit and the input/output unit, and a receiver for sequentially receiving the data packets and parity signals. The receiver includes a buffer for storing a plurality of the data packets. The stored data packets are controllably unloaded from the buffer, and a buffer emptied signal is sent back to the transmitter as each data packet is unloaded. The transmitter has a counter which calculates the number of data packets stored in the buffer and asserts a signal that prevents the transmitter from transmitting additional data packets when the buffer becomes full. The receiver compares the parity of the received data packets to the respective parity signals to check for parity errors.