Patents by Inventor Ruggero Susella

Ruggero Susella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11582039
    Abstract: A method performs cryptographic operations on data in a processing device. An iterative operation between a first operand formed by a given number of words and a second operand using a secret key is performed. The iterative operation includes, for each bit of the secret key, applying one of a first set operations and a second set of operations to the first operand and to the second operand depending on of the bit, and conditionally swapping words of the first and the second operand based on a control bit value obtained by applying a logic XOR function to a random bit.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: February 14, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ruggero Susella, Filippo Melzani, Guido Marco Bertoni
  • Publication number: 20230017265
    Abstract: One or more keys are derived from a master key by executing a plurality of encryption operations. A first encryption operation uses the master key to encrypt a plaintext input having a plurality of bytes. Multiple intermediate encryption operations are performed using a respective intermediate key generated by a previous encryption operation to encrypt respective plaintext inputs having a number of bytes. At least two bytes of a plaintext input have values based on a respective set of bits of a plurality of sets of bits of an initialization vector, wherein individual bits of the respective set of bits are introduced into respective individual bytes of the plaintext input and the respective set of bits has at least two bits and at most a number of bits equal to the number of bytes of the plaintext input.
    Type: Application
    Filed: July 5, 2022
    Publication date: January 19, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Ruggero SUSELLA
  • Publication number: 20220417012
    Abstract: Encryption of data using a cryptographic device is protected. The protecting includes generating a first output of a first branch by encrypting a constant using a key, and generating a first output of a second branch by encrypting a constant using a key. The first output of the first branch, the first output of the second branch, and a first portion of plaintext data are XORed, generating a first portion of cypher text. A second output of the first branch is generated by encrypting the first output of the first branch using a key, and a second output of the second branch is generated by encrypting the first output of the second branch using a key. The second output of the first branch, the second output of the second branch, and a second portion of plaintext data are XORed, generating a second portion of cypher text.
    Type: Application
    Filed: June 13, 2022
    Publication date: December 29, 2022
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Ruggero SUSELLA
  • Patent number: 11502836
    Abstract: A scalar multiplication operation includes an iterative procedure performing a set of operations at each iteration on a bit or on a group of consecutive bits of a secret key. The multiplication operation includes multiplying values of projective format coordinates by a random value. The random value is a product of a random number generated over a range having as end value a first value, with a second value, which is larger than said first value. The first value is a power of two of a word size multiplied by a multiplier value, minus one. The second value is equal to a power of two of a number of bits of the coordinates divided by the first value. The multiplier value is an integer greater than or equal to one and smaller than a ratio of said number of bits to the word size.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: November 15, 2022
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ruggero Susella, Guido Marco Bertoni
  • Publication number: 20210226789
    Abstract: A scalar multiplication operation includes an iterative procedure performing a set of operations at each iteration on a bit or on a group of consecutive bits of a secret key. The multiplication operation includes multiplying values of projective format coordinates by a random value. The random value is a product of a random number generated over a range having as end value a first value, with a second value, which is larger than said first value. The first value is a power of two of a word size multiplied by a multiplier value, minus one. The second value is equal to a power of two of a number of bits of the coordinates divided by the first value. The multiplier value is an integer greater than or equal to one and smaller than a ratio of said number of bits to the word size.
    Type: Application
    Filed: January 14, 2021
    Publication date: July 22, 2021
    Inventors: Ruggero SUSELLA, Guido Marco BERTONI
  • Publication number: 20210194689
    Abstract: A method performs cryptographic operations on data in a processing device. An iterative operation between a first operand formed by a given number of words and a second operand using a secret key is performed. The iterative operation includes, for each bit of the secret key, applying one of a first set operations and a second set of operations to the first operand and to the second operand depending on of the bit, and conditionally swapping words of the first and the second operand based on a control bit value obtained by applying a logic XOR function to a random bit.
    Type: Application
    Filed: December 21, 2020
    Publication date: June 24, 2021
    Inventors: Ruggero SUSELLA, Filippo MELZANI, Guido Marco BERTONI
  • Patent number: 10505712
    Abstract: A modular reduction calculation on a first number and a second number is protected from side-channel attacks, such as timing attacks. A first intermediate modular reduction result is calculated. A value corresponding to four times the first number is added to the first intermediate modular reduction result, generating a second intermediate modular reduction result. A value corresponding to the first number multiplied by a most significant word of the second intermediate modular reduction result plus 1, is subtracted from the second intermediate modular reduction result, generating a third intermediate modular reduction result. A cryptographic operation is performed using a result of the modular reduction calculation.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: December 10, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Ruggero Susella
  • Patent number: 10333718
    Abstract: A device includes digital signature generation circuitry. The digital signature generation circuitry, in operation, generates a digital signature of a digital message by computing a first public curve point as a scalar product of a first secret integer key and a base point of an elliptic curve and applying a transform to data of the received digital message.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: June 25, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ruggero Susella, Sofia Montrasio
  • Publication number: 20190165928
    Abstract: A modular reduction calculation on a first number and a second number is protected from side-channel attacks, such as timing attacks. A first intermediate modular reduction result is calculated. A value corresponding to four times the first number is added to the first intermediate modular reduction result, generating a second intermediate modular reduction result. A value corresponding to the first number multiplied by a most significant word of the second intermediate modular reduction result plus 1, is subtracted from the second intermediate modular reduction result, generating a third intermediate modular reduction result. A cryptographic operation is performed using a result of the modular reduction calculation.
    Type: Application
    Filed: November 30, 2017
    Publication date: May 30, 2019
    Inventor: Ruggero Susella
  • Publication number: 20180026798
    Abstract: A device includes digital signature generation circuitry. The digital signature generation circuitry, in operation, generates a digital signature of a digital message by computing a first public curve point as a scalar product of a first secret integer key and a base point of an elliptic curve and applying a transform to data of the received digital message.
    Type: Application
    Filed: February 23, 2017
    Publication date: January 25, 2018
    Inventors: Ruggero SUSELLA, Sofia MONTRASIO
  • Patent number: 9425961
    Abstract: A polynomial representation (bi(x)) in an AES finite field ( Z 2 ? [ x ] ( r ? ( x ) ) ) of input bytes (bi) of a state matrix (B) is obtained. A plurality (1) of irreducible polynomials (fi(y)) and a moving map (?i) are used to map each polynomial (bi(x)) of the polynomial representation into a respective field of polynomials ( Z 2 ? [ y ] ( f i ? ( y ) ) ) computed with respect to one of the irreducible polynomials (fi(y)), to obtain respective moved polynomials (?i(y)). The moved polynomials (?i(y)) are mapped into a polynomial (a(z)) of a polynomial ring ( Z 2 ? [ z ] ( p ? ( z ) ) ) , obtained by applying an isomorphism (?) between the fields of polynomials ( Z 2 ? [ y ] ( f i ? ( y ) ) ) and the polynomial ring ( Z 2 ? [ z ] ( p ? ( z ) ) ) based upon the Chinese remainder theorem (CRT). AES encryption is applied to the polynomial (a(z)).
    Type: Grant
    Filed: March 17, 2015
    Date of Patent: August 23, 2016
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ruggero Susella, Silvia Mella
  • Patent number: 9152383
    Abstract: An embodiment concerns a method for encrypting a message through a cryptographic algorithm including a computation of a mathematical function including the computation of one or more modular multiplications. Such a cryptographic algorithm has a respective module. The method, carried out with an electronic device, includes: providing a first parameter; generating a random number; calculating a Montgomery parameter based on said first parameter and on a integer multiple of said random number; generating a representation of the message to be encrypted in a Montgomery domain through a Montgomery conversion function applied to the message and to the Montgomery parameter; carrying out the calculation of the mathematical function on the message represented in the Montgomery domain.
    Type: Grant
    Filed: November 5, 2012
    Date of Patent: October 6, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Guido Marco Bertoni, Ruggero Susella
  • Publication number: 20150270967
    Abstract: A polynomial representation (bi(x)) in an AES finite field ( Z 2 ? [ x ] ( r ? ( x ) ) ) of input bytes (bi) of a state matrix (B) is obtained. A plurality (1) of irreducible polynomials (fi(y)) and a moving map (?i) are used to map each polynomial (bi(x)) of the polynomial representation into a respective field of polynomials ( Z 2 ? [ y ] ( f i ? ( y ) ) ) computed with respect to one of the irreducible polynomials (fi(y)), to obtain respective moved polynomials (?i(y)). The moved polynomials (?i(y)) are mapped into a polynomial (a(z)) of a polynomial ring ( Z 2 ? [ z ] ( p ? ( z ) ) ) , obtained by applying an isomorphism (?) between the fields of polynomials ( Z 2 ? [ y ] ( f i ? ( y ) ) ) and the polynomial ring ( Z 2 ? [ z ] ( p ? ( z ) ) ) based upon the Chinese remainder theorem (CRT). AES encryption is applied to the polynomial (a(z)).
    Type: Application
    Filed: March 17, 2015
    Publication date: September 24, 2015
    Inventors: Ruggero Susella, Silvia Mella
  • Patent number: 8817977
    Abstract: A method for generating a digital signature includes calculating a first magnitude representative of the inverse of a random number raised to the power two; obtaining a first element of the digital signature by executing scalar multiplication between an established point of the elliptic curve and the random number; obtaining a second magnitude by executing modular multiplication, with modulus corresponding to the established elliptic curve's order between the first magnitude and the secret encryption key; obtaining a third magnitude by executing a modular multiplication, with modulus corresponding to the established elliptic curve's order between the random number and the secret encryption key; obtaining a first addend of a second element of the digital signature by executing a modular multiplication, with modulus corresponding to the established elliptic curve's order between the second magnitude and the third magnitude; and generating a second element of the digital signature based on the first addend.
    Type: Grant
    Filed: September 16, 2011
    Date of Patent: August 26, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Guido Marco Bertoni, Ruggero Susella, Andrea Palomba
  • Publication number: 20120069994
    Abstract: A method for generating a digital signature includes calculating a first magnitude representative of the inverse of a random number raised to the power two; obtaining a first element of the digital signature by executing scalar multiplication between an established point of the elliptic curve and the random number; obtaining a second magnitude by executing modular multiplication, with modulus corresponding to the established elliptic curve's order between the first magnitude and the secret encryption key; obtaining a third magnitude by executing a modular multiplication, with modulus corresponding to the established elliptic curve's order between the random number and the secret encryption key; obtaining a first addend of a second element of the digital signature by executing a modular multiplication, with modulus corresponding to the established elliptic curve's order between the second magnitude and the third magnitude; and generating a second element of the digital signature based on the first addend.
    Type: Application
    Filed: September 16, 2011
    Publication date: March 22, 2012
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Guido Marco Bertoni, Ruggero Susella, Andrea Palomba